Import updated device trees from Linux tag v5.9. This picks up new
hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI
files for the Pinebook and the Teres-I, since the ANX6345 bridge is
now supported upstream.

A couple of headers needed updates for recently-added hardware support.

Acked-by: Maxime Ripard <mrip...@kernel.org>
Signed-off-by: Samuel Holland <sam...@sholland.org>
---
 arch/arm/dts/Makefile                         |   4 +
 arch/arm/dts/axp803.dtsi                      |  82 +--
 arch/arm/dts/sun50i-a64-amarula-relic.dts     | 109 +++-
 arch/arm/dts/sun50i-a64-bananapi-m64.dts      | 118 ++--
 arch/arm/dts/sun50i-a64-cpu-opp.dtsi          |  75 +++
 arch/arm/dts/sun50i-a64-nanopi-a64.dts        |  70 +--
 .../dts/sun50i-a64-oceanic-5205-5inmfd.dts    |  31 +-
 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts    |  12 +-
 arch/arm/dts/sun50i-a64-olinuxino.dts         | 113 ++--
 arch/arm/dts/sun50i-a64-orangepi-win.dts      | 127 +++--
 arch/arm/dts/sun50i-a64-pine64-lts.dts        |   7 +-
 arch/arm/dts/sun50i-a64-pine64-plus.dts       |  52 +-
 arch/arm/dts/sun50i-a64-pine64.dts            |  97 ++--
 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi  |  17 -
 arch/arm/dts/sun50i-a64-pinebook.dts          | 237 ++++++--
 arch/arm/dts/sun50i-a64-pinephone-1.0.dts     |  11 +
 arch/arm/dts/sun50i-a64-pinephone-1.1.dts     |  30 +
 arch/arm/dts/sun50i-a64-pinephone-1.2.dts     |  40 ++
 arch/arm/dts/sun50i-a64-pinephone.dtsi        | 429 ++++++++++++++
 arch/arm/dts/sun50i-a64-pinetab.dts           | 460 +++++++++++++++
 arch/arm/dts/sun50i-a64-sopine-baseboard.dts  | 113 ++--
 arch/arm/dts/sun50i-a64-sopine.dtsi           |  69 +--
 arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi   |  41 --
 arch/arm/dts/sun50i-a64-teres-i.dts           | 138 ++++-
 arch/arm/dts/sun50i-a64.dtsi                  | 532 ++++++++++++++----
 include/dt-bindings/clock/sun50i-a64-ccu.h    |   4 +-
 include/dt-bindings/clock/sun8i-de2.h         |   3 +
 include/dt-bindings/reset/sun8i-de2.h         |   1 +
 28 files changed, 2390 insertions(+), 632 deletions(-)
 create mode 100644 arch/arm/dts/sun50i-a64-cpu-opp.dtsi
 delete mode 100644 arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
 create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.0.dts
 create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.1.dts
 create mode 100644 arch/arm/dts/sun50i-a64-pinephone-1.2.dts
 create mode 100644 arch/arm/dts/sun50i-a64-pinephone.dtsi
 create mode 100644 arch/arm/dts/sun50i-a64-pinetab.dts
 delete mode 100644 arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b195723f164..d15511c699e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -610,6 +610,10 @@ dtb-$(CONFIG_MACH_SUN50I) += \
        sun50i-a64-pine64-plus.dtb \
        sun50i-a64-pine64.dtb \
        sun50i-a64-pinebook.dtb \
+       sun50i-a64-pinephone-1.0.dtb \
+       sun50i-a64-pinephone-1.1.dtb \
+       sun50i-a64-pinephone-1.2.dtb \
+       sun50i-a64-pinetab.dtb \
        sun50i-a64-sopine-baseboard.dtb \
        sun50i-a64-teres-i.dtb
 dtb-$(CONFIG_MACH_SUN9I) += \
diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi
index e5eae8bafc4..10e9186a76b 100644
--- a/arch/arm/dts/axp803.dtsi
+++ b/arch/arm/dts/axp803.dtsi
@@ -1,44 +1,5 @@
-/*
- * Copyright 2017 Icenowy Zheng <icen...@aosc.xyz>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright 2017 Icenowy Zheng <icen...@aosc.xyz>
 
 /*
  * AXP803 Integrated Power Management Chip
@@ -49,6 +10,39 @@
        interrupt-controller;
        #interrupt-cells = <1>;
 
+       ac_power_supply: ac-power-supply {
+               compatible = "x-powers,axp803-ac-power-supply",
+                            "x-powers,axp813-ac-power-supply";
+               status = "disabled";
+       };
+
+       axp_adc: adc {
+               compatible = "x-powers,axp803-adc", "x-powers,axp813-adc";
+               #io-channel-cells = <1>;
+       };
+
+       axp_gpio: gpio {
+               compatible = "x-powers,axp803-gpio", "x-powers,axp813-gpio";
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio0_ldo: gpio0-ldo {
+                       pins = "GPIO0";
+                       function = "ldo";
+               };
+
+               gpio1_ldo: gpio1-ldo {
+                       pins = "GPIO1";
+                       function = "ldo";
+               };
+       };
+
+       battery_power_supply: battery-power-supply {
+               compatible = "x-powers,axp803-battery-power-supply",
+                            "x-powers,axp813-battery-power-supply";
+               status = "disabled";
+       };
+
        regulators {
                /* Default work frequency for buck regulators */
                x-powers,dcdc-freq = <3000>;
@@ -152,4 +146,10 @@
                        status = "disabled";
                };
        };
+
+       usb_power_supply: usb-power-supply {
+               compatible = "x-powers,axp803-usb-power-supply",
+                            "x-powers,axp813-usb-power-supply";
+               status = "disabled";
+       };
 };
diff --git a/arch/arm/dts/sun50i-a64-amarula-relic.dts 
b/arch/arm/dts/sun50i-a64-amarula-relic.dts
index 6cb2b7f0c81..c7bd73f35ed 100644
--- a/arch/arm/dts/sun50i-a64-amarula-relic.dts
+++ b/arch/arm/dts/sun50i-a64-amarula-relic.dts
@@ -1,12 +1,11 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2018 Amarula Solutions B.V.
- * Author: Jagan Teki <ja...@amarulasolutions.com>
- */
+// Copyright (C) 2018 Amarula Solutions B.V.
+// Author: Jagan Teki <ja...@amarulasolutions.com>
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -22,6 +21,41 @@
                stdout-path = "serial0:115200n8";
        };
 
+       i2c {
+               compatible = "i2c-gpio";
+               sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>;
+               scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>;
+               i2c-gpio,delay-us = <5>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ov5640: camera@3c {
+                       compatible = "ovti,ov5640";
+                       reg = <0x3c>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&csi_mclk_pin>;
+                       clocks = <&ccu CLK_CSI_MCLK>;
+                       clock-names = "xclk";
+
+                       AVDD-supply = <&reg_aldo1>;
+                       DOVDD-supply = <&reg_dldo3>;
+                       DVDD-supply = <&reg_eldo3>;
+                       reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* 
CSI-RST-R: PE14 */
+                       powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* 
CSI-STBY-R: PE15 */
+
+                       port {
+                               ov5640_ep: endpoint {
+                                       remote-endpoint = <&csi_ep>;
+                                       bus-width = <8>;
+                                       hsync-active = <1>; /* Active high */
+                                       vsync-active = <0>; /* Active low */
+                                       data-active = <1>;  /* Active high */
+                                       pclk-sample = <1>;  /* Rising */
+                               };
+                       };
+               };
+       };
+
        wifi_pwrseq: wifi-pwrseq {
                compatible = "mmc-pwrseq-simple";
                clocks = <&rtc 1>;
@@ -30,10 +64,70 @@
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&csi {
+       status = "okay";
+
+       port {
+               csi_ep: endpoint {
+                       remote-endpoint = <&ov5640_ep>;
+                       bus-width = <8>;
+                       hsync-active = <1>; /* Active high */
+                       vsync-active = <0>; /* Active low */
+                       data-active = <1>;  /* Active high */
+                       pclk-sample = <1>;  /* Rising */
+               };
+       };
+};
+
 &ehci0 {
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+
+       sensor@48 {
+               compatible = "st,stlm75";
+               reg = <0x48>;
+       };
+};
+
+&i2c0_pins {
+       bias-pull-up;
+};
+
+&i2c1 {
+       status = "okay";
+
+       touchscreen@5d {
+               compatible = "goodix,gt5663";
+               reg = <0x5d>;
+               AVDD28-supply = <&reg_ldo_io0>;                 /* VCC-CTP: 
GPIO0-LDO */
+               interrupt-parent = <&pio>;
+               interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
+               irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>;        /* CTP-INT: PH4 
*/
+               reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>;      /* CTP-RST: PH8 
*/
+               touchscreen-inverted-x;
+               touchscreen-inverted-y;
+       };
+};
+
 &mmc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc1_pins>;
@@ -197,6 +291,13 @@
        regulator-name = "vdd-cpus";
 };
 
+&reg_ldo_io0 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "vcc-ctp";
+       status = "okay";
+};
+
 &reg_rtc_ldo {
        regulator-name = "vcc-rtc";
 };
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts 
b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
index ef1c90401bb..883f217efb8 100644
--- a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
@@ -1,48 +1,10 @@
-/*
- * Copyright (c) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2016 ARM Ltd.
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -94,9 +56,40 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+               clocks = <&rtc 1>;
+               clock-names = "ext_clock";
        };
 };
 
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&dai {
+       status = "okay";
+};
+
 &de {
        status = "okay";
 };
@@ -130,8 +123,6 @@
 };
 
 &i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
        status = "okay";
 };
 
@@ -207,6 +198,14 @@
 
 #include "axp803.dtsi"
 
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
 &reg_aldo1 {
        /*
         * This regulator also drives the PE pingroup GPIOs,
@@ -326,6 +325,22 @@
        vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&sound {
+       status = "okay";
+       simple-audio-card,widgets = "Headphone", "Headphone Jack",
+                                   "Microphone", "Microphone Jack",
+                                   "Microphone", "Onboard Microphone";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "Headphone Jack", "HP",
+                       "MIC2", "Microphone Jack",
+                       "Onboard Microphone", "MBIAS",
+                       "MIC1", "Onboard Microphone";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;
@@ -335,7 +350,19 @@
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+       uart-has-rtscts;
        status = "okay";
+
+       bluetooth {
+               compatible = "brcm,bcm43438-bt";
+               clocks = <&rtc 1>;
+               clock-names = "lpo";
+               vbat-supply = <&reg_dldo2>;
+               vddio-supply = <&reg_dldo4>;
+               device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+               shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+       };
 };
 
 &usb_otg {
@@ -343,8 +370,13 @@
        status = "okay";
 };
 
+&usb_power_supply {
+       status = "okay";
+};
+
 &usbphy {
        usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+       usb0_vbus_power-supply = <&usb_power_supply>;
        usb0_vbus-supply = <&reg_drivevbus>;
        status = "okay";
 };
diff --git a/arch/arm/dts/sun50i-a64-cpu-opp.dtsi 
b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
new file mode 100644
index 00000000000..578c37490d9
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-cpu-opp.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 Vasily khoruzhick <anars...@gmail.com>
+ */
+
+/ {
+       cpu0_opp_table: opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp-648000000 {
+                       opp-hz = /bits/ 64 <648000000>;
+                       opp-microvolt = <1040000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-816000000 {
+                       opp-hz = /bits/ 64 <816000000>;
+                       opp-microvolt = <1100000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-912000000 {
+                       opp-hz = /bits/ 64 <912000000>;
+                       opp-microvolt = <1120000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-960000000 {
+                       opp-hz = /bits/ 64 <960000000>;
+                       opp-microvolt = <1160000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-1008000000 {
+                       opp-hz = /bits/ 64 <1008000000>;
+                       opp-microvolt = <1200000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-1056000000 {
+                       opp-hz = /bits/ 64 <1056000000>;
+                       opp-microvolt = <1240000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-1104000000 {
+                       opp-hz = /bits/ 64 <1104000000>;
+                       opp-microvolt = <1260000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+
+               opp-1152000000 {
+                       opp-hz = /bits/ 64 <1152000000>;
+                       opp-microvolt = <1300000>;
+                       clock-latency-ns = <244144>; /* 8 32k periods */
+               };
+       };
+};
+
+&cpu0 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu1 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu2 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
+
+&cpu3 {
+       operating-points-v2 = <&cpu0_opp_table>;
+};
diff --git a/arch/arm/dts/sun50i-a64-nanopi-a64.dts 
b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
index 31884dbc883..e58db8a6cab 100644
--- a/arch/arm/dts/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm/dts/sun50i-a64-nanopi-a64.dts
@@ -1,48 +1,10 @@
-/*
- * Copyright (C) 2017 Jagan Teki <jt...@openedev.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Jagan Teki <jt...@openedev.com>
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -87,6 +49,22 @@
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &de {
        status = "okay";
 };
@@ -120,12 +98,6 @@
 };
 
 /* i2c1 connected with gpio headers like pine64, bananapi */
-&i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
-       status = "disabled";
-};
-
 &i2c1_pins {
        bias-pull-up;
 };
@@ -186,6 +158,10 @@
 
 #include "axp803.dtsi"
 
+&ac_power_supply {
+       status = "okay";
+};
+
 &reg_aldo2 {
        regulator-always-on;
        regulator-min-microvolt = <1800000>;
diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts 
b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
index 6a2154525d1..577f9e1d08a 100644
--- a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
+++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts
@@ -1,9 +1,7 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2019 Oceanic Systems (UK) Ltd.
- * Copyright (C) 2019 Amarula Solutions B.V.
- * Author: Jagan Teki <ja...@amarulasolutions.com>
- */
+// Copyright (C) 2019 Oceanic Systems (UK) Ltd.
+// Copyright (C) 2019 Amarula Solutions B.V.
+// Author: Jagan Teki <ja...@amarulasolutions.com>
 
 /dts-v1/;
 
@@ -37,6 +35,22 @@
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+
+       touchscreen@5d {
+               compatible = "goodix,gt911";
+               reg = <0x5d>;
+               AVDD28-supply = <&reg_ldo_io0>;                 /* VDD_CTP: 
GPIO0-LDO */
+               interrupt-parent = <&pio>;
+               interrupts = <7 4 IRQ_TYPE_EDGE_FALLING>;
+               irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>;        /* CTP-INT: PH4 
*/
+               reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>;     /* CTP-RST: 
PH11 */
+               touchscreen-inverted-x;
+               touchscreen-inverted-y;
+       };
+};
+
 &mdio {
        ext_rgmii_phy: ethernet-phy@1 {
                compatible = "ethernet-phy-ieee802.3-c22";
@@ -52,6 +66,13 @@
        regulator-name = "vcc-phy";
 };
 
+&reg_ldo_io0 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "vdd-ctp";
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;
diff --git a/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts 
b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
index 96ab0227e82..efb20846de4 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
@@ -1,8 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2018 Martin Ayotte <martinayo...@gmail.com>
- * Copyright (C) 2019 Sunil Mohan Adapa <su...@medhas.org>
- */
+// Copyright (C) 2018 Martin Ayotte <martinayo...@gmail.com>
+// Copyright (C) 2019 Sunil Mohan Adapa <su...@medhas.org>
 
 #include "sun50i-a64-olinuxino.dts"
 
@@ -15,9 +13,13 @@
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_pins>;
        vmmc-supply = <&reg_dcdc1>;
-       vqmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_eldo1>;
        bus-width = <8>;
        non-removable;
        cap-mmc-hw-reset;
        status = "okay";
 };
+
+&pio {
+       vcc-pc-supply = <&reg_eldo1>;
+};
diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts 
b/arch/arm/dts/sun50i-a64-olinuxino.dts
index f7a4bccaa5d..f3f8e177ab6 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
@@ -1,48 +1,10 @@
-/*
- * Copyright (C) 2017 Jagan Teki <jt...@openedev.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Jagan Teki <jt...@openedev.com>
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -70,6 +32,15 @@
                };
        };
 
+       leds {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       label = "a64-olinuxino:red:user";
+                       gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
+               };
+       };
+
        reg_usb1_vbus: usb1-vbus {
                compatible = "regulator-fixed";
                regulator-name = "usb1-vbus";
@@ -87,6 +58,22 @@
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &de {
        status = "okay";
 };
@@ -140,7 +127,7 @@
 &mmc1 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc1_pins>;
-       vmmc-supply = <&reg_aldo2>;
+       vmmc-supply = <&reg_dcdc1>;
        vqmmc-supply = <&reg_dldo4>;
        mmc-pwrseq = <&wifi_pwrseq>;
        bus-width = <4>;
@@ -163,6 +150,34 @@
        status = "okay";
 };
 
+&pio {
+       vcc-pc-supply = <&reg_dcdc1>;
+       vcc-pd-supply = <&reg_dcdc1>;
+       vcc-pe-supply = <&reg_aldo1>;
+       vcc-pg-supply = <&reg_dldo4>;
+};
+
+&r_pio {
+       /*
+        * FIXME: We can't add that supply for now since it would
+        * create a circular dependency between pinctrl, the regulator
+        * and the RSB Bus.
+        *
+        * vcc-pl-supply = <&reg_aldo2>;
+        */
+};
+
+&pio {
+       vcc-pa-supply = <&reg_dcdc1>;
+       vcc-pb-supply = <&reg_dcdc1>;
+       vcc-pc-supply = <&reg_dcdc1>;
+       vcc-pd-supply = <&reg_dcdc1>;
+       vcc-pe-supply = <&reg_aldo1>;
+       vcc-pf-supply = <&reg_dcdc1>;
+       vcc-pg-supply = <&reg_dldo4>;
+       vcc-ph-supply = <&reg_dcdc1>;
+};
+
 &r_rsb {
        status = "okay";
 
@@ -175,8 +190,22 @@
        };
 };
 
+/* VCC-PL is powered by aldo2 but we cannot add it as the RSB */
+/* interface used to talk to the PMIC in on the PL pins */
+/* &r_pio { */
+/*     vcc-pl-supply = <&reg_aldo2>; */
+/* }; */
+
 #include "axp803.dtsi"
 
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
 &reg_aldo1 {
        regulator-always-on;
        regulator-min-microvolt = <2800000>;
diff --git a/arch/arm/dts/sun50i-a64-orangepi-win.dts 
b/arch/arm/dts/sun50i-a64-orangepi-win.dts
index b0c64f75792..fde9c7a99b1 100644
--- a/arch/arm/dts/sun50i-a64-orangepi-win.dts
+++ b/arch/arm/dts/sun50i-a64-orangepi-win.dts
@@ -1,49 +1,11 @@
-/*
- * Copyright (C) 2017 Jagan Teki <jt...@openedev.com>
- * Copyright (C) 2017-2018 Samuel Holland <sam...@sholland.org>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Jagan Teki <jt...@openedev.com>
+// Copyright (C) 2017-2018 Samuel Holland <sam...@sholland.org>
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -109,9 +71,40 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 */
+               clocks = <&rtc 1>;
+               clock-names = "ext_clock";
        };
 };
 
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&dai {
+       status = "okay";
+};
+
 &de {
        status = "okay";
 };
@@ -170,6 +163,14 @@
        bus-width = <4>;
        non-removable;
        status = "okay";
+
+       brcmf: wifi@1 {
+               reg = <1>;
+               compatible = "brcm,bcm4329-fmac";
+               interrupt-parent = <&r_pio>;
+               interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
+               interrupt-names = "host-wake";
+       };
 };
 
 &ohci0 {
@@ -180,6 +181,10 @@
        status = "okay";
 };
 
+&r_ir {
+       status = "okay";
+};
+
 &r_rsb {
        status = "okay";
 
@@ -188,11 +193,20 @@
                reg = <0x3a3>;
                interrupt-parent = <&r_intc>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
        };
 };
 
 #include "axp803.dtsi"
 
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
 &reg_aldo1 {
        regulator-min-microvolt = <2800000>;
        regulator-max-microvolt = <2800000>;
@@ -310,6 +324,22 @@
        vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&sound {
+       status = "okay";
+       simple-audio-card,widgets = "Headphone", "Headphone Jack",
+                                   "Microphone", "Microphone Jack",
+                                   "Microphone", "Onboard Microphone";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "Headphone Jack", "HP",
+                       "MIC2", "Microphone Jack",
+                       "Onboard Microphone", "MBIAS",
+                       "MIC1", "Onboard Microphone";
+};
+
 &spi0 {
        status = "okay";
 
@@ -333,7 +363,20 @@
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+       uart-has-rtscts;
        status = "okay";
+
+       bluetooth {
+               compatible = "brcm,bcm43438-bt";
+               max-speed = <1500000>;
+               clocks = <&rtc 1>;
+               clock-names = "lpo";
+               vbat-supply = <&reg_dldo2>;
+               vddio-supply = <&reg_dldo4>;
+               device-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+               shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+       };
 };
 
 /* On Pi-2 connector, RTS/CTS optional */
diff --git a/arch/arm/dts/sun50i-a64-pine64-lts.dts 
b/arch/arm/dts/sun50i-a64-pine64-lts.dts
index 72d6961dc31..302e24be0a3 100644
--- a/arch/arm/dts/sun50i-a64-pine64-lts.dts
+++ b/arch/arm/dts/sun50i-a64-pine64-lts.dts
@@ -1,8 +1,5 @@
-/*
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- *
- * Copyright (c) 2018 ARM Ltd.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 ARM Ltd.
 
 #include "sun50i-a64-sopine-baseboard.dts"
 
diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts 
b/arch/arm/dts/sun50i-a64-pine64-plus.dts
index 24f1aac366d..b26181cf909 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts
+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts
@@ -1,44 +1,5 @@
-/*
- * Copyright (c) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2016 ARM Ltd.
 
 #include "sun50i-a64-pine64.dts"
 
@@ -63,3 +24,12 @@
                reg = <1>;
        };
 };
+
+&reg_dc1sw {
+       /*
+        * Ethernet PHY needs 30ms to properly power up and some more
+        * to initialize. 100ms should be plenty of time to finish
+        * whole process.
+        */
+       regulator-enable-ramp-delay = <100000>;
+};
diff --git a/arch/arm/dts/sun50i-a64-pine64.dts 
b/arch/arm/dts/sun50i-a64-pine64.dts
index c077b6c1f45..2165f238af1 100644
--- a/arch/arm/dts/sun50i-a64-pine64.dts
+++ b/arch/arm/dts/sun50i-a64-pine64.dts
@@ -1,48 +1,10 @@
-/*
- * Copyright (c) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2016 ARM Ltd.
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -75,6 +37,35 @@
        };
 };
 
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&dai {
+       status = "okay";
+};
+
 &de {
        status = "okay";
 };
@@ -109,8 +100,6 @@
 };
 
 &i2c1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c1_pins>;
        status = "okay";
 };
 
@@ -156,6 +145,14 @@
 
 #include "axp803.dtsi"
 
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
 &reg_aldo2 {
        regulator-always-on;
        regulator-min-microvolt = <1800000>;
@@ -259,6 +256,20 @@
        vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&sound {
+       simple-audio-card,aux-devs = <&codec_analog>;
+       simple-audio-card,widgets = "Microphone", "Microphone Jack",
+                                   "Headphone", "Headphone Jack";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "Headphone Jack", "HP",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "MIC2", "Microphone Jack";
+       status = "okay";
+};
+
 /* On Euler connector */
 &spdif {
        status = "disabled";
diff --git a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi 
b/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
deleted file mode 100644
index 650ab97ec99..00000000000
--- a/arch/arm/dts/sun50i-a64-pinebook-u-boot.dtsi
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2018 Vasily Khoruzhick <anars...@gmail.com>
- *
- */
-
-#include "sunxi-u-boot.dtsi"
-
-/* The ANX6345 eDP-bridge is on r_i2c */
-&r_i2c {
-       anx6345: edp-bridge@38 {
-               compatible = "analogix,anx6345";
-               reg = <0x38>;
-               reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
-               status = "okay";
-       };
-};
diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts 
b/arch/arm/dts/sun50i-a64-pinebook.dts
index ec537c52972..64b1c54f87c 100644
--- a/arch/arm/dts/sun50i-a64-pinebook.dts
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -1,15 +1,14 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2017 Icenowy Zheng <icen...@aosc.xyz>
- * Copyright (C) 2018 Vasily Khoruzhick <anars...@gmail.com>
- *
- */
+// Copyright (C) 2017 Icenowy Zheng <icen...@aosc.xyz>
+// Copyright (C) 2018 Vasily Khoruzhick <anars...@gmail.com>
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/gpio-keys.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/pwm/pwm.h>
 
@@ -22,32 +21,17 @@
                ethernet0 = &rtl8723cs;
        };
 
-       vdd_bl: regulator@0 {
-               compatible = "regulator-fixed";
-               regulator-name = "bl-3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
-               enable-active-high;
-       };
-
        backlight: backlight {
                compatible = "pwm-backlight";
                pwms = <&pwm 0 50000 0>;
                brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
                default-brightness-level = <2>;
                enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
-               power-supply = <&vdd_bl>;
+               power-supply = <&reg_vbklt>;
        };
 
        chosen {
                stdout-path = "serial0:115200n8";
-
-               framebuffer-lcd {
-                       panel-supply = <&reg_dc1sw>;
-                       dvdd25-supply = <&reg_dldo2>;
-                       dvdd12-supply = <&reg_fldo1>;
-               };
        };
 
        gpio_keys {
@@ -60,20 +44,85 @@
                        linux,code = <SW_LID>;
                        linux,can-disable;
                        wakeup-source;
+                       wakeup-event-action = <EV_ACT_DEASSERTED>;
+               };
+       };
+
+       panel_edp: panel-edp {
+               compatible = "neweast,wjfh116008a";
+               backlight = <&backlight>;
+               power-supply = <&reg_dc1sw>;
+
+               port {
+                       panel_edp_in: endpoint {
+                               remote-endpoint = <&anx6345_out_edp>;
+                       };
                };
        };
 
-       reg_vcc3v3: vcc3v3 {
+       reg_vbklt: vbklt {
                compatible = "regulator-fixed";
-               regulator-name = "vcc3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
+               regulator-name = "vbklt";
+               regulator-min-microvolt = <18000000>;
+               regulator-max-microvolt = <18000000>;
+               gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+               enable-active-high;
+       };
+
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&axp_gpio 0 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
        };
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
        };
+
+       speaker_amp: audio-amplifier {
+               compatible = "simple-audio-amplifier";
+               VCC-supply = <&reg_vcc5v0>;
+               enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+               sound-name-prefix = "Speaker Amp";
+       };
+
+};
+
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&dai {
+       status = "okay";
+};
+
+&de {
+       status = "okay";
 };
 
 &ehci0 {
@@ -86,11 +135,15 @@
        status = "okay";
 };
 
+&mixer0 {
+       status = "okay";
+};
+
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins>;
        vmmc-supply = <&reg_dcdc1>;
-       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        disable-wp;
        bus-width = <4>;
        status = "okay";
@@ -133,10 +186,61 @@
        status = "okay";
 };
 
+&pio {
+       vcc-pc-supply = <&reg_eldo1>;
+       vcc-pd-supply = <&reg_dcdc1>;
+       vcc-pe-supply = <&reg_aldo1>;
+       vcc-pg-supply = <&reg_eldo1>;
+};
+
 &pwm {
        status = "okay";
 };
 
+&r_i2c {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&r_i2c_pl89_pins>;
+       status = "okay";
+
+       anx6345: anx6345@38 {
+               compatible = "analogix,anx6345";
+               reg = <0x38>;
+               reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+               dvdd25-supply = <&reg_dldo2>;
+               dvdd12-supply = <&reg_fldo1>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       anx6345_in: port@0 {
+                               reg = <0>;
+                               anx6345_in_tcon0: endpoint {
+                                       remote-endpoint = <&tcon0_out_anx6345>;
+                               };
+                       };
+
+                       anx6345_out: port@1 {
+                               reg = <1>;
+                               anx6345_out_edp: endpoint {
+                                       remote-endpoint = <&panel_edp_in>;
+                               };
+                       };
+               };
+       };
+};
+
+&r_pio {
+       /*
+        * FIXME: We can't add that supply for now since it would
+        * create a circular dependency between pinctrl, the regulator
+        * and the RSB Bus.
+        *
+        * vcc-pl-supply = <&reg_aldo2>;
+        */
+};
+
 &r_rsb {
        status = "okay";
 
@@ -148,20 +252,18 @@
        };
 };
 
-/* The ANX6345 eDP-bridge is on r_i2c */
-&r_i2c {
-       clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&r_i2c_pl89_pins>;
+#include "axp803.dtsi"
+
+&ac_power_supply {
        status = "okay";
 };
 
-#include "axp803.dtsi"
+&battery_power_supply {
+       status = "okay";
+};
 
 &reg_aldo1 {
-       regulator-min-microvolt = <2800000>;
-       regulator-max-microvolt = <2800000>;
-       regulator-name = "vcc-csi";
+       regulator-name = "vcc-pe";
 };
 
 &reg_aldo2 {
@@ -224,12 +326,6 @@
        regulator-name = "vcc-edp";
 };
 
-&reg_dldo3 {
-       regulator-min-microvolt = <3300000>;
-       regulator-max-microvolt = <3300000>;
-       regulator-name = "avdd-csi";
-};
-
 &reg_dldo4 {
        regulator-min-microvolt = <3300000>;
        regulator-max-microvolt = <3300000>;
@@ -243,12 +339,6 @@
        regulator-name = "cpvdd";
 };
 
-&reg_eldo3 {
-       regulator-min-microvolt = <1800000>;
-       regulator-max-microvolt = <1800000>;
-       regulator-name = "vdd-1v8-csi";
-};
-
 &reg_fldo1 {
        regulator-min-microvolt = <1200000>;
        regulator-max-microvolt = <1200000>;
@@ -262,21 +352,56 @@
        regulator-name = "vdd-cpus";
 };
 
-&reg_ldo_io0 {
-       regulator-min-microvolt = <3300000>;
-       regulator-max-microvolt = <3300000>;
-       regulator-name = "vcc-usb";
-       status = "okay";
-};
-
 &reg_rtc_ldo {
        regulator-name = "vcc-rtc";
 };
 
+&simplefb_lcd {
+       panel-supply = <&reg_dc1sw>;
+       dvdd25-supply = <&reg_dldo2>;
+       dvdd12-supply = <&reg_fldo1>;
+};
+
 &simplefb_hdmi {
        vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&sound {
+       status = "okay";
+       simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
+       simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
+                                   "Microphone", "Internal Microphone Right",
+                                   "Headphone", "Headphone Jack",
+                                   "Speaker", "Internal Speaker";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "Speaker Amp INL", "LINEOUT",
+                       "Speaker Amp INR", "LINEOUT",
+                       "Internal Speaker", "Speaker Amp OUTL",
+                       "Internal Speaker", "Speaker Amp OUTR",
+                       "Headphone Jack", "HP",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "Internal Microphone Left", "MBIAS",
+                       "MIC1", "Internal Microphone Left",
+                       "Internal Microphone Right", "HBIAS",
+                       "MIC2", "Internal Microphone Right";
+};
+
+&tcon0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&lcd_rgb666_pins>;
+
+       status = "okay";
+};
+
+&tcon0_out {
+       tcon0_out_anx6345: endpoint {
+               remote-endpoint = <&anx6345_in_tcon0>;
+       };
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;
@@ -288,7 +413,7 @@
 };
 
 &usbphy {
-       usb0_vbus-supply = <&reg_ldo_io0>;
-       usb1_vbus-supply = <&reg_ldo_io0>;
+       usb0_vbus-supply = <&reg_vcc5v0>;
+       usb1_vbus-supply = <&reg_vcc5v0>;
        status = "okay";
 };
diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.0.dts 
b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts
new file mode 100644
index 00000000000..0c42272106a
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinephone-1.0.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman <meg...@megous.com>
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+       model = "Pine64 PinePhone Developer Batch (1.0)";
+       compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64";
+};
diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.1.dts 
b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts
new file mode 100644
index 00000000000..3e99a87e9ce
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinephone-1.1.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman <meg...@megous.com>
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+       model = "Pine64 PinePhone Braveheart (1.1)";
+       compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
+};
+
+&backlight {
+       power-supply = <&reg_ldo_io0>;
+       /*
+        * PWM backlight circuit on this PinePhone revision was changed since
+        * 1.0, and the lowest PWM duty cycle that doesn't lead to backlight
+        * being off is around 20%. Duty cycle for the lowest brightness level
+        * also varries quite a bit between individual boards, so the lowest
+        * value here was chosen as a safe default.
+        */
+       brightness-levels = <
+               774  793  814  842
+               882  935  1003 1088
+               1192 1316 1462 1633
+               1830 2054 2309 2596
+               2916 3271 3664 4096>;
+       num-interpolated-steps = <50>;
+       default-brightness-level = <400>;
+};
diff --git a/arch/arm/dts/sun50i-a64-pinephone-1.2.dts 
b/arch/arm/dts/sun50i-a64-pinephone-1.2.dts
new file mode 100644
index 00000000000..a9f5b670c9b
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinephone-1.2.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Ondrej Jirman <meg...@megous.com>
+
+/dts-v1/;
+
+#include "sun50i-a64-pinephone.dtsi"
+
+/ {
+       model = "Pine64 PinePhone (1.2)";
+       compatible = "pine64,pinephone-1.2", "allwinner,sun50i-a64";
+};
+
+&backlight {
+       power-supply = <&reg_ldo_io0>;
+       /*
+        * PWM backlight circuit on this PinePhone revision was changed since 
1.0,
+        * and the lowest PWM duty cycle that doesn't lead to backlight being 
off
+        * is around 10%. Duty cycle for the lowest brightness level also 
varries
+        * quite a bit between individual boards, so the lowest value here was
+        * chosen as a safe default.
+        */
+       brightness-levels = <
+               5000 5248 5506 5858 6345
+               6987 7805 8823 10062 11543
+               13287 15317 17654 20319 23336
+               26724 30505 34702 39335 44427
+               50000
+       >;
+       num-interpolated-steps = <50>;
+       default-brightness-level = <500>;
+};
+
+&lis3mdl {
+       /*
+        * Board revision 1.2 fixed routing of the interrupt to DRDY pin,
+        * enable interrupts.
+        */
+       interrupt-parent = <&pio>;
+       interrupts = <1 1 IRQ_TYPE_EDGE_RISING>; /* PB1 */
+};
diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi 
b/arch/arm/dts/sun50i-a64-pinephone.dtsi
new file mode 100644
index 00000000000..25150aba749
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi
@@ -0,0 +1,429 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Icenowy Zheng <icen...@aosc.xyz>
+// Copyright (C) 2020 Martijn Braam <mart...@brixit.nl>
+// Copyright (C) 2020 Ondrej Jirman <meg...@megous.com>
+
+#include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+       aliases {
+               serial0 = &uart0;
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
+               enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+               /* Backlight configuration differs per PinePhone revision. */
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               blue {
+                       function = LED_FUNCTION_INDICATOR;
+                       color = <LED_COLOR_ID_BLUE>;
+                       gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+               };
+
+               green {
+                       function = LED_FUNCTION_INDICATOR;
+                       color = <LED_COLOR_ID_GREEN>;
+                       gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
+               };
+
+               red {
+                       function = LED_FUNCTION_INDICATOR;
+                       color = <LED_COLOR_ID_RED>;
+                       gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
+               };
+       };
+
+       speaker_amp: audio-amplifier {
+               compatible = "simple-audio-amplifier";
+               enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
+               sound-name-prefix = "Speaker Amp";
+       };
+
+       vibrator {
+               compatible = "gpio-vibrator";
+               enable-gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
+               vcc-supply = <&reg_dcdc1>;
+       };
+};
+
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&dai {
+       status = "okay";
+};
+
+&de {
+       status = "okay";
+};
+
+&dphy {
+       status = "okay";
+};
+
+&dsi {
+       vcc-dsi-supply = <&reg_dldo1>;
+       status = "okay";
+
+       panel@0 {
+               compatible = "xingbangda,xbd599";
+               reg = <0>;
+               reset-gpios = <&pio 3 23 GPIO_ACTIVE_LOW>; /* PD23 */
+               iovcc-supply = <&reg_dldo2>;
+               vcc-supply = <&reg_ldo_io0>;
+               backlight = <&backlight>;
+       };
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       touchscreen@5d {
+               compatible = "goodix,gt917s";
+               reg = <0x5d>;
+               interrupt-parent = <&pio>;
+               interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
+               irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+               reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+               AVDD28-supply = <&reg_ldo_io0>;
+               VDDIO-supply = <&reg_ldo_io0>;
+               touchscreen-size-x = <720>;
+               touchscreen-size-y = <1440>;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+
+       /* Magnetometer */
+       lis3mdl: lis3mdl@1e {
+               compatible = "st,lis3mdl-magn";
+               reg = <0x1e>;
+               vdd-supply = <&reg_dldo1>;
+               vddio-supply = <&reg_dldo1>;
+       };
+
+       /* Accelerometer/gyroscope */
+       mpu6050@68 {
+               compatible = "invensense,mpu6050";
+               reg = <0x68>;
+               interrupt-parent = <&pio>;
+               interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */
+               vdd-supply = <&reg_dldo1>;
+               vddio-supply = <&reg_dldo1>;
+       };
+};
+
+/* Connected to pogo pins (external spring based pinheader for user addons) */
+&i2c2 {
+       status = "okay";
+};
+
+&lradc {
+       vref-supply = <&reg_aldo3>;
+       status = "okay";
+
+       button-200 {
+               label = "Volume Up";
+               linux,code = <KEY_VOLUMEUP>;
+               channel = <0>;
+               voltage = <200000>;
+       };
+
+       button-400 {
+               label = "Volume Down";
+               linux,code = <KEY_VOLUMEDOWN>;
+               channel = <0>;
+               voltage = <400000>;
+       };
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       disable-wp;
+       bus-width = <4>;
+       status = "okay";
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&pio {
+       vcc-pb-supply = <&reg_dcdc1>;
+       vcc-pc-supply = <&reg_dcdc1>;
+       vcc-pd-supply = <&reg_dcdc1>;
+       vcc-pe-supply = <&reg_aldo1>;
+       vcc-pf-supply = <&reg_dcdc1>;
+       vcc-pg-supply = <&reg_dldo4>;
+       vcc-ph-supply = <&reg_dcdc1>;
+};
+
+&r_pio {
+       /*
+        * FIXME: We can't add that supply for now since it would
+        * create a circular dependency between pinctrl, the regulator
+        * and the RSB Bus.
+        *
+        * vcc-pl-supply = <&reg_aldo2>;
+        */
+};
+
+&r_pwm {
+       status = "okay";
+};
+
+&r_rsb {
+       status = "okay";
+
+       axp803: pmic@3a3 {
+               compatible = "x-powers,axp803";
+               reg = <0x3a3>;
+               interrupt-parent = <&r_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
+&reg_aldo1 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "dovdd-csi";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <2700000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1000000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-dsi-sensor";
+};
+
+&reg_dldo2 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-mipi-io";
+};
+
+&reg_dldo3 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "avdd-csi";
+};
+
+&reg_dldo4 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-wifi-io";
+};
+
+&reg_eldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-lpddr";
+};
+
+&reg_eldo3 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "dvdd-1v8-csi";
+};
+
+&reg_fldo1 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-1v2-hsic";
+};
+
+&reg_fldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpus";
+};
+
+&reg_ldo_io0 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-lcd-ctp-stk";
+       status = "okay";
+};
+
+&reg_ldo_io1 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-1v8-typec";
+       status = "okay";
+};
+
+&reg_rtc_ldo {
+       regulator-name = "vcc-rtc";
+};
+
+&sound {
+       status = "okay";
+       simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
+       simple-audio-card,widgets = "Microphone", "Headset Microphone",
+                                   "Microphone", "Internal Microphone",
+                                   "Headphone", "Headphone Jack",
+                                   "Speaker", "Internal Earpiece",
+                                   "Speaker", "Internal Speaker";
+       simple-audio-card,routing =
+                       "Headphone Jack", "HP",
+                       "Internal Earpiece", "EARPIECE",
+                       "Internal Speaker", "Speaker Amp OUTL",
+                       "Internal Speaker", "Speaker Amp OUTR",
+                       "Speaker Amp INL", "LINEOUT",
+                       "Speaker Amp INR", "LINEOUT",
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "Internal Microphone", "MBIAS",
+                       "MIC1", "Internal Microphone",
+                       "Headset Microphone", "HBIAS",
+                       "MIC2", "Headset Microphone";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pb_pins>;
+       status = "okay";
+};
+
+/* Connected to the modem (hardware flow control can't be used) */
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pins>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+&usb_power_supply {
+       status = "okay";
+};
+
+&usbphy {
+       status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts 
b/arch/arm/dts/sun50i-a64-pinetab.dts
new file mode 100644
index 00000000000..dc4ab6b434f
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-pinetab.dts
@@ -0,0 +1,460 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng <icen...@aosc.xyz>
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+       model = "PineTab";
+       compatible = "pine64,pinetab", "allwinner,sun50i-a64";
+
+       aliases {
+               serial0 = &uart0;
+               ethernet0 = &rtl8723cs;
+       };
+
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+               brightness-levels = <0 16 18 20 22 24 26 29 32 35 38 42 46 51 
56 62 68 75 83 91 100>;
+               default-brightness-level = <15>;
+               enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+               power-supply = <&vdd_bl>;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       i2c-csi {
+               compatible = "i2c-gpio";
+               sda-gpios = <&pio 4 13 GPIO_ACTIVE_HIGH>; /* PE13 */
+               scl-gpios = <&pio 4 12 GPIO_ACTIVE_HIGH>; /* PE12 */
+               i2c-gpio,delay-us = <5>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               /* Rear camera */
+               ov5640: camera@3c {
+                       compatible = "ovti,ov5640";
+                       reg = <0x3c>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&csi_mclk_pin>;
+                       clocks = <&ccu CLK_CSI_MCLK>;
+                       clock-names = "xclk";
+
+                       AVDD-supply = <&reg_dldo3>;
+                       DOVDD-supply = <&reg_aldo1>;
+                       DVDD-supply = <&reg_eldo3>;
+                       reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>; /* PE14 */
+                       powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 
*/
+
+                       port {
+                               ov5640_ep: endpoint {
+                                       remote-endpoint = <&csi_ep>;
+                                       bus-width = <8>;
+                                       hsync-active = <1>; /* Active high */
+                                       vsync-active = <0>; /* Active low */
+                                       data-active = <1>;  /* Active high */
+                                       pclk-sample = <1>;  /* Rising */
+                               };
+                       };
+               };
+       };
+
+       speaker_amp: audio-amplifier {
+               compatible = "simple-audio-amplifier";
+               enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+               sound-name-prefix = "Speaker Amp";
+       };
+
+       vdd_bl: regulator@0 {
+               compatible = "regulator-fixed";
+               regulator-name = "bl-3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+               enable-active-high;
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+               post-power-on-delay-ms = <200>;
+       };
+};
+
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&csi {
+       status = "okay";
+
+       port {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               csi_ep: endpoint {
+                       remote-endpoint = <&ov5640_ep>;
+                       bus-width = <8>;
+                       hsync-active = <1>; /* Active high */
+                       vsync-active = <0>; /* Active low */
+                       data-active = <1>;  /* Active high */
+                       pclk-sample = <1>;  /* Rising */
+               };
+       };
+};
+
+&dai {
+       status = "okay";
+};
+
+&de {
+       status = "okay";
+};
+
+&dphy {
+       status = "okay";
+};
+
+&dsi {
+       vcc-dsi-supply = <&reg_dldo1>;
+       status = "okay";
+
+       panel@0 {
+               compatible = "feixin,k101-im2ba02";
+               reg = <0>;
+               avdd-supply = <&reg_dc1sw>;
+               dvdd-supply = <&reg_dc1sw>;
+               cvdd-supply = <&reg_ldo_io1>;
+               reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+               backlight = <&backlight>;
+       };
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       touchscreen@5d {
+               compatible = "goodix,gt9271";
+               reg = <0x5d>;
+               interrupt-parent = <&pio>;
+               interrupts = <7 4 IRQ_TYPE_LEVEL_HIGH>; /* PH4 */
+               irq-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
+               reset-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
+               AVDD28-supply = <&reg_ldo_io1>;
+       };
+};
+
+&i2c0_pins {
+       bias-pull-up;
+};
+
+&i2c1 {
+       status = "okay";
+
+       /* TODO: add Bochs BMA223 accelerometer here */
+};
+
+&lradc {
+       vref-supply = <&reg_aldo3>;
+       status = "okay";
+
+       button-200 {
+               label = "Volume Up";
+               linux,code = <KEY_VOLUMEUP>;
+               channel = <0>;
+               voltage = <200000>;
+       };
+
+       button-400 {
+               label = "Volume Down";
+               linux,code = <KEY_VOLUMEDOWN>;
+               channel = <0>;
+               voltage = <400000>;
+       };
+};
+
+&mixer1 {
+       status = "okay";
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+       disable-wp;
+       bus-width = <4>;
+       status = "okay";
+};
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       vmmc-supply = <&reg_dldo4>;
+       vqmmc-supply = <&reg_eldo1>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+
+       rtl8723cs: wifi@1 {
+               reg = <1>;
+       };
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_pins>;
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&pwm {
+       status = "okay";
+};
+
+&r_rsb {
+       status = "okay";
+
+       axp803: pmic@3a3 {
+               compatible = "x-powers,axp803";
+               reg = <0x3a3>;
+               interrupt-parent = <&r_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               x-powers,drive-vbus-en;
+       };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
+&reg_aldo1 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "dovdd-csi";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <2700000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dc1sw {
+       regulator-name = "vcc-lcd";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1000000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dcdc6 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-hdmi-dsi-sensor";
+};
+
+&reg_dldo3 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "avdd-csi";
+};
+
+&reg_dldo4 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi";
+};
+
+&reg_drivevbus {
+       regulator-name = "usb0-vbus";
+       status = "okay";
+};
+
+&reg_eldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "cpvdd";
+};
+
+&reg_eldo2 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcca-1v8";
+};
+
+&reg_eldo3 {
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "dvdd-1v8-csi";
+};
+
+&reg_fldo1 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vcc-1v2-hsic";
+};
+
+&reg_fldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpus";
+};
+
+&reg_ldo_io0 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-usb";
+       status = "okay";
+};
+
+&reg_ldo_io1 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-enable-ramp-delay = <3500000>;
+       regulator-name = "vcc-touchscreen";
+       status = "okay";
+};
+
+&reg_rtc_ldo {
+       regulator-name = "vcc-rtc";
+};
+
+&sound {
+       status = "okay";
+       simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
+       simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
+                                   "Microphone", "Internal Microphone Right",
+                                   "Headphone", "Headphone Jack",
+                                   "Speaker", "Internal Speaker";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "Speaker Amp INL", "LINEOUT",
+                       "Speaker Amp INR", "LINEOUT",
+                       "Internal Speaker", "Speaker Amp OUTL",
+                       "Internal Speaker", "Speaker Amp OUTR",
+                       "Headphone Jack", "HP",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "Internal Microphone Left", "MBIAS",
+                       "MIC1", "Internal Microphone Left",
+                       "Internal Microphone Right", "HBIAS",
+                       "MIC2", "Internal Microphone Right";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pb_pins>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usb_power_supply {
+       status = "okay";
+};
+
+&usbphy {
+       usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+       usb0_vbus_power-supply = <&usb_power_supply>;
+       usb0_vbus-supply = <&reg_drivevbus>;
+       usb1_vbus-supply = <&reg_ldo_io0>;
+       status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts 
b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
index 53fcc9098df..2f6ea9f3f6a 100644
--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
@@ -1,47 +1,7 @@
-/*
- * Copyright (c) 2017 Icenowy Zheng <icen...@aosc.xyz>
- *
- * Based on sun50i-a64-pine64.dts, which is:
- *   Copyright (c) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2017 Icenowy Zheng <icen...@aosc.xyz>
+// Based on sun50i-a64-pine64.dts, which is:
+//   Copyright (c) 2016 ARM Ltd.
 
 /dts-v1/;
 
@@ -55,6 +15,10 @@
        aliases {
                ethernet0 = &emac;
                serial0 = &uart0;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
+               serial4 = &uart4;
        };
 
        chosen {
@@ -80,6 +44,26 @@
        };
 };
 
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       status = "okay";
+};
+
+&dai {
+       status = "okay";
+};
+
 &de {
        status = "okay";
 };
@@ -139,6 +123,12 @@
 };
 
 &reg_dc1sw {
+       /*
+        * Ethernet PHY needs 30ms to properly power up and some more
+        * to initialize. 100ms should be plenty of time to finish
+        * whole process.
+        */
+       regulator-enable-ramp-delay = <100000>;
        regulator-name = "vcc-phy";
 };
 
@@ -164,12 +154,47 @@
        vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&sound {
+       simple-audio-card,aux-devs = <&codec_analog>;
+       simple-audio-card,widgets = "Microphone", "Microphone Jack",
+                                   "Headphone", "Headphone Jack";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "Headphone Jack", "HP",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "MIC2", "Microphone Jack";
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;
        status = "okay";
 };
 
+/* On Pi-2 connector */
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "disabled";
+};
+
+/* On Euler connector */
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pins>;
+       status = "disabled";
+};
+
+/* On Euler connector, RTS/CTS optional */
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart4_pins>;
+       status = "disabled";
+};
+
 &usb_otg {
        dr_mode = "host";
        status = "okay";
diff --git a/arch/arm/dts/sun50i-a64-sopine.dtsi 
b/arch/arm/dts/sun50i-a64-sopine.dtsi
index 6723b8695e0..c48692b06e1 100644
--- a/arch/arm/dts/sun50i-a64-sopine.dtsi
+++ b/arch/arm/dts/sun50i-a64-sopine.dtsi
@@ -1,52 +1,33 @@
-/*
- * Copyright (c) 2017 Icenowy Zheng <icen...@aosc.xyz>
- *
- * Based on sun50i-a64-pine64.dts, which is:
- *   Copyright (c) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2017 Icenowy Zheng <icen...@aosc.xyz>
+// Based on sun50i-a64-pine64.dts, which is:
+//   Copyright (c) 2016 ARM Ltd.
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &mmc0 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc0_pins>;
diff --git a/arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi 
b/arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi
deleted file mode 100644
index 1a64b7d09c2..00000000000
--- a/arch/arm/dts/sun50i-a64-teres-i-u-boot.dtsi
+++ /dev/null
@@ -1,41 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2019 Vasily Khoruzhick <anars...@gmail.com>
- *
- */
-
-#include "sunxi-u-boot.dtsi"
-
-/ {
-       vdd_bl: regulator@0 {
-               compatible = "regulator-fixed";
-               regulator-name = "bl-3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
-               enable-active-high;
-       };
-
-       backlight: backlight {
-               compatible = "pwm-backlight";
-               pwms = <&pwm 0 50000 0>;
-               brightness-levels = <0 5 10 15 20 30 40 55 70 85 100>;
-               default-brightness-level = <2>;
-               enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
-               power-supply = <&vdd_bl>;
-       };
-};
-
-/* The ANX6345 eDP-bridge is on i2c */
-&i2c0 {
-       anx6345: edp-bridge@38 {
-               compatible = "analogix,anx6345";
-               reg = <0x38>;
-               reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
-               status = "okay";
-       };
-};
-
-&pwm {
-       status = "okay";
-};
diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts 
b/arch/arm/dts/sun50i-a64-teres-i.dts
index c455b24dd07..f5df5f705b7 100644
--- a/arch/arm/dts/sun50i-a64-teres-i.dts
+++ b/arch/arm/dts/sun50i-a64-teres-i.dts
@@ -1,13 +1,11 @@
-/*
- * Copyright (C) Harald Geyer <har...@ccbib.org>
- * based on sun50i-a64-olinuxino.dts by Jagan Teki <jt...@openedev.com>
- *
- * SPDX-License-Identifier: (GPL-2.0 OR MIT)
- */
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// Copyright (C) Harald Geyer <har...@ccbib.org>
+// based on sun50i-a64-olinuxino.dts by Jagan Teki <jt...@openedev.com>
 
 /dts-v1/;
 
 #include "sun50i-a64.dtsi"
+#include "sun50i-a64-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
@@ -21,6 +19,15 @@
                serial0 = &uart0;
        };
 
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm 0 50000 0>;
+               power-supply = <&reg_dcdc1>;
+               brightness-levels = <0 5 7 10 14 20 28 40 56 80 112>;
+               default-brightness-level = <5>;
+               enable-gpios = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD23 */
+       };
+
        chosen {
                stdout-path = "serial0:115200n8";
 
@@ -70,6 +77,45 @@
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
        };
+
+       speaker_amp: audio-amplifier {
+               compatible = "simple-audio-amplifier";
+               enable-gpios = <&r_pio 0 12 GPIO_ACTIVE_HIGH>; /* PL12 */
+               sound-name-prefix = "Speaker Amp";
+       };
+};
+
+&codec {
+       status = "okay";
+};
+
+&codec_analog {
+       cpvdd-supply = <&reg_eldo1>;
+       status = "okay";
+};
+
+&dai {
+       status = "okay";
+};
+
+&de {
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_dcdc2>;
 };
 
 &ehci1 {
@@ -77,14 +123,31 @@
 };
 
 
-/* The ANX6345 eDP-bridge is on i2c0. There is no linux (mainline)
- * driver for this chip at the moment, the bootloader initializes it.
- * However it can be accessed with the i2c-dev driver from user space.
- */
 &i2c0 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&i2c0_pins>;
+       status = "okay";
+
+       anx6345: anx6345@38 {
+               compatible = "analogix,anx6345";
+               reg = <0x38>;
+               reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
+               dvdd25-supply = <&reg_dldo2>;
+               dvdd12-supply = <&reg_dldo3>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               anx6345_in: endpoint {
+                                       remote-endpoint = <&tcon0_out_anx6345>;
+                               };
+                       };
+               };
+       };
+};
+
+&mixer0 {
        status = "okay";
 };
 
@@ -131,6 +194,10 @@
        status = "okay";
 };
 
+&pwm {
+       status = "okay";
+};
+
 &r_rsb {
        status = "okay";
 
@@ -145,6 +212,14 @@
 
 #include "axp803.dtsi"
 
+&ac_power_supply {
+       status = "okay";
+};
+
+&battery_power_supply {
+       status = "okay";
+};
+
 &reg_aldo1 {
        regulator-always-on;
        regulator-min-microvolt = <2800000>;
@@ -239,7 +314,7 @@
 };
 
 /*
- * The A64 chip cannot work without this regulator off, although
+ * The A64 chip cannot work with this regulator off, although
  * it seems to be only driving the AR100 core.
  * Maybe we don't still know well about CPUs domain.
  */
@@ -258,6 +333,43 @@
        vcc-hdmi-supply = <&reg_dldo1>;
 };
 
+&sound {
+       simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
+       simple-audio-card,widgets = "Headphone", "Headphone Jack",
+                                   "Microphone", "Headset Microphone",
+                                   "Microphone", "Internal Microphone",
+                                   "Speaker", "Internal Speaker";
+       simple-audio-card,routing =
+                       "Left DAC", "AIF1 Slot 0 Left",
+                       "Right DAC", "AIF1 Slot 0 Right",
+                       "AIF1 Slot 0 Left ADC", "Left ADC",
+                       "AIF1 Slot 0 Right ADC", "Right ADC",
+                       "Headphone Jack", "HP",
+                       "Speaker Amp INL", "LINEOUT",
+                       "Speaker Amp INR", "LINEOUT",
+                       "Internal Speaker", "Speaker Amp OUTL",
+                       "Internal Speaker", "Speaker Amp OUTR",
+                       "Internal Microphone", "MBIAS",
+                       "MIC1", "Internal Microphone",
+                       "Headset Microphone", "HBIAS",
+                       "MIC2", "Headset Microphone";
+       status = "okay";
+};
+
+&tcon0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&lcd_rgb666_pins>;
+
+       status = "okay";
+};
+
+&tcon0_out {
+       tcon0_out_anx6345: endpoint@0 {
+               reg = <0>;
+               remote-endpoint = <&anx6345_in>;
+       };
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index ff41abc96a9..8dfbcd14407 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -1,46 +1,7 @@
-/*
- * Copyright (C) 2016 ARM Ltd.
- * based on the Allwinner H3 dtsi:
- *    Copyright (C) 2015 Jens Kuske <jensku...@gmail.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+// based on the Allwinner H3 dtsi:
+//    Copyright (C) 2015 Jens Kuske <jensku...@gmail.com>
 
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
 #include <dt-bindings/clock/sun8i-de2.h>
@@ -49,6 +10,7 @@
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
 #include <dt-bindings/reset/sun8i-de2.h>
 #include <dt-bindings/reset/sun8i-r-ccu.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
        interrupt-parent = <&gic>;
@@ -84,35 +46,47 @@
                #size-cells = <0>;
 
                cpu0: cpu@0 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <0>;
                        enable-method = "psci";
                        next-level-cache = <&L2>;
+                       clocks = <&ccu 21>;
+                       clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <1>;
                        enable-method = "psci";
                        next-level-cache = <&L2>;
+                       clocks = <&ccu 21>;
+                       clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <2>;
                        enable-method = "psci";
                        next-level-cache = <&L2>;
+                       clocks = <&ccu 21>;
+                       clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <3>;
                        enable-method = "psci";
                        next-level-cache = <&L2>;
+                       clocks = <&ccu 21>;
+                       clock-names = "cpu";
+                       #cooling-cells = <2>;
                };
 
                L2: l2-cache {
@@ -139,15 +113,16 @@
                #clock-cells = <0>;
                compatible = "fixed-clock";
                clock-frequency = <32768>;
-               clock-output-names = "osc32k";
+               clock-output-names = "ext-osc32k";
        };
 
-       iosc: internal-osc-clk {
-               #clock-cells = <0>;
-               compatible = "fixed-clock";
-               clock-frequency = <16000000>;
-               clock-accuracy = <300000000>;
-               clock-output-names = "iosc";
+       pmu {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
        };
 
        psci {
@@ -155,26 +130,33 @@
                method = "smc";
        };
 
-       sound_spdif {
+       sound: sound {
                compatible = "simple-audio-card";
-               simple-audio-card,name = "On-board SPDIF";
+               simple-audio-card,name = "sun50i-a64-audio";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,frame-master = <&cpudai>;
+               simple-audio-card,bitclock-master = <&cpudai>;
+               simple-audio-card,mclk-fs = <128>;
+               simple-audio-card,aux-devs = <&codec_analog>;
+               simple-audio-card,routing =
+                               "Left DAC", "AIF1 Slot 0 Left",
+                               "Right DAC", "AIF1 Slot 0 Right",
+                               "AIF1 Slot 0 Left ADC", "Left ADC",
+                               "AIF1 Slot 0 Right ADC", "Right ADC";
+               status = "disabled";
 
-               simple-audio-card,cpu {
-                       sound-dai = <&spdif>;
+               cpudai: simple-audio-card,cpu {
+                       sound-dai = <&dai>;
                };
 
-               simple-audio-card,codec {
-                       sound-dai = <&spdif_out>;
+               link_codec: simple-audio-card,codec {
+                       sound-dai = <&codec>;
                };
        };
 
-       spdif_out: spdif-out {
-               #sound-dai-cells = <0>;
-               compatible = "linux,spdif-dit";
-       };
-
        timer {
                compatible = "arm,armv8-timer";
+               allwinner,erratum-unknown1;
                interrupts = <GIC_PPI 13
                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
                             <GIC_PPI 14
@@ -185,13 +167,76 @@
                        (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
        };
 
+       thermal-zones {
+               cpu_thermal: cpu0-thermal {
+                       /* milliseconds */
+                       polling-delay-passive = <0>;
+                       polling-delay = <0>;
+                       thermal-sensors = <&ths 0>;
+
+                       cooling-maps {
+                               map0 {
+                                       trip = <&cpu_alert0>;
+                                       cooling-device = <&cpu0 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                               map1 {
+                                       trip = <&cpu_alert1>;
+                                       cooling-device = <&cpu0 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu1 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu2 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                                        <&cpu3 
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                               };
+                       };
+
+                       trips {
+                               cpu_alert0: cpu_alert0 {
+                                       /* milliCelsius */
+                                       temperature = <75000>;
+                                       hysteresis = <2000>;
+                                       type = "passive";
+                               };
+
+                               cpu_alert1: cpu_alert1 {
+                                       /* milliCelsius */
+                                       temperature = <90000>;
+                                       hysteresis = <2000>;
+                                       type = "hot";
+                               };
+
+                               cpu_crit: cpu_crit {
+                                       /* milliCelsius */
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               gpu0_thermal: gpu0-thermal {
+                       /* milliseconds */
+                       polling-delay-passive = <0>;
+                       polling-delay = <0>;
+                       thermal-sensors = <&ths 1>;
+               };
+
+               gpu1_thermal: gpu1-thermal {
+                       /* milliseconds */
+                       polling-delay-passive = <0>;
+                       polling-delay = <0>;
+                       thermal-sensors = <&ths 2>;
+               };
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
 
-               de2@1000000 {
+               bus@1000000 {
                        compatible = "allwinner,sun50i-a64-de2";
                        reg = <0x1000000 0x400000>;
                        allwinner,sram = <&de2_sram 1>;
@@ -201,16 +246,28 @@
 
                        display_clocks: clock@0 {
                                compatible = "allwinner,sun50i-a64-de2-clk";
-                               reg = <0x0 0x100000>;
-                               clocks = <&ccu CLK_DE>,
-                                        <&ccu CLK_BUS_DE>;
-                               clock-names = "mod",
-                                             "bus";
+                               reg = <0x0 0x10000>;
+                               clocks = <&ccu CLK_BUS_DE>,
+                                        <&ccu CLK_DE>;
+                               clock-names = "bus",
+                                             "mod";
                                resets = <&ccu RST_BUS_DE>;
                                #clock-cells = <1>;
                                #reset-cells = <1>;
                        };
 
+                       rotate: rotate@20000 {
+                               compatible = "allwinner,sun50i-a64-de2-rotate",
+                                            "allwinner,sun8i-a83t-de2-rotate";
+                               reg = <0x20000 0x10000>;
+                               interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&display_clocks CLK_BUS_ROT>,
+                                        <&display_clocks CLK_ROT>;
+                               clock-names = "bus",
+                                             "mod";
+                               resets = <&display_clocks RST_ROT>;
+                       };
+
                        mixer0: mixer@100000 {
                                compatible = "allwinner,sun50i-a64-de2-mixer-0";
                                reg = <0x100000 0x100000>;
@@ -225,11 +282,19 @@
                                        #size-cells = <0>;
 
                                        mixer0_out: port@1 {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
                                                reg = <1>;
 
-                                               mixer0_out_tcon0: endpoint {
+                                               mixer0_out_tcon0: endpoint@0 {
+                                                       reg = <0>;
                                                        remote-endpoint = 
<&tcon0_in_mixer0>;
                                                };
+
+                                               mixer0_out_tcon1: endpoint@1 {
+                                                       reg = <1>;
+                                                       remote-endpoint = 
<&tcon1_in_mixer0>;
+                                               };
                                        };
                                };
                        };
@@ -248,9 +313,17 @@
                                        #size-cells = <0>;
 
                                        mixer1_out: port@1 {
+                                               #address-cells = <1>;
+                                               #size-cells = <0>;
                                                reg = <1>;
 
-                                               mixer1_out_tcon1: endpoint {
+                                               mixer1_out_tcon0: endpoint@0 {
+                                                       reg = <0>;
+                                                       remote-endpoint = 
<&tcon0_in_mixer1>;
+                                               };
+
+                                               mixer1_out_tcon1: endpoint@1 {
+                                                       reg = <1>;
                                                        remote-endpoint = 
<&tcon1_in_mixer1>;
                                                };
                                        };
@@ -259,8 +332,7 @@
                };
 
                syscon: syscon@1c00000 {
-                       compatible = "allwinner,sun50i-a64-system-control",
-                               "syscon";
+                       compatible = "allwinner,sun50i-a64-system-control";
                        reg = <0x01c00000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
@@ -278,6 +350,20 @@
                                        reg = <0x0000 0x28000>;
                                };
                        };
+
+                       sram_c1: sram@1d00000 {
+                               compatible = "mmio-sram";
+                               reg = <0x01d00000 0x40000>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x01d00000 0x40000>;
+
+                               ve_sram: sram-section@0 {
+                                       compatible = 
"allwinner,sun50i-a64-sram-c1",
+                                                    
"allwinner,sun4i-a10-sram-c1";
+                                       reg = <0x000000 0x40000>;
+                               };
+                       };
                };
 
                dma: dma-controller@1c02000 {
@@ -299,6 +385,7 @@
                        clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>;
                        clock-names = "ahb", "tcon-ch0";
                        clock-output-names = "tcon-pixel-clock";
+                       #clock-cells = <0>;
                        resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
                        reset-names = "lcd", "lvds";
 
@@ -315,12 +402,23 @@
                                                reg = <0>;
                                                remote-endpoint = 
<&mixer0_out_tcon0>;
                                        };
+
+                                       tcon0_in_mixer1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = 
<&mixer1_out_tcon0>;
+                                       };
                                };
 
                                tcon0_out: port@1 {
                                        #address-cells = <1>;
                                        #size-cells = <0>;
                                        reg = <1>;
+
+                                       tcon0_out_dsi: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = 
<&dsi_in_tcon0>;
+                                               allwinner,tcon-channel = <1>;
+                                       };
                                };
                        };
                };
@@ -340,9 +438,17 @@
                                #size-cells = <0>;
 
                                tcon1_in: port@0 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
                                        reg = <0>;
 
-                                       tcon1_in_mixer1: endpoint {
+                                       tcon1_in_mixer0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = 
<&mixer0_out_tcon1>;
+                                       };
+
+                                       tcon1_in_mixer1: endpoint@1 {
+                                               reg = <1>;
                                                remote-endpoint = 
<&mixer1_out_tcon1>;
                                        };
                                };
@@ -360,6 +466,17 @@
                        };
                };
 
+               video-codec@1c0e000 {
+                       compatible = "allwinner,sun50i-a64-video-engine";
+                       reg = <0x01c0e000 0x1000>;
+                       clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+                                <&ccu CLK_DRAM_VE>;
+                       clock-names = "ahb", "mod", "ram";
+                       resets = <&ccu RST_BUS_VE>;
+                       interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                       allwinner,sram = <&ve_sram 1>;
+               };
+
                mmc0: mmc@1c0f000 {
                        compatible = "allwinner,sun50i-a64-mmc";
                        reg = <0x01c0f000 0x1000>;
@@ -405,6 +522,31 @@
                sid: eeprom@1c14000 {
                        compatible = "allwinner,sun50i-a64-sid";
                        reg = <0x1c14000 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ths_calibration: thermal-sensor-calibration@34 {
+                               reg = <0x34 0x8>;
+                       };
+               };
+
+               crypto: crypto@1c15000 {
+                       compatible = "allwinner,sun50i-a64-crypto";
+                       reg = <0x01c15000 0x1000>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_CE>;
+               };
+
+               msgbox: mailbox@1c17000 {
+                       compatible = "allwinner,sun50i-a64-msgbox",
+                                    "allwinner,sun6i-a31-msgbox";
+                       reg = <0x01c17000 0x1000>;
+                       clocks = <&ccu CLK_BUS_MSGBOX>;
+                       resets = <&ccu RST_BUS_MSGBOX>;
+                       interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
+                       #mbox-cells = <1>;
                };
 
                usb_otg: usb@1c19000 {
@@ -417,6 +559,7 @@
                        phys = <&usbphy 0>;
                        phy-names = "usb";
                        extcon = <&usbphy 0>;
+                       dr_mode = "otg";
                        status = "disabled";
                };
 
@@ -491,7 +634,7 @@
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun50i-a64-ccu";
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&osc32k>;
+                       clocks = <&osc24M>, <&rtc 0>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -503,22 +646,50 @@
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu 58>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+                       clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
                        #interrupt-cells = <3>;
 
-                       i2c0_pins: i2c0_pins {
+                       csi_pins: csi-pins {
+                               pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
+                                      "PE7", "PE8", "PE9", "PE10", "PE11";
+                               function = "csi";
+                       };
+
+                       /omit-if-no-ref/
+                       csi_mclk_pin: csi-mclk-pin {
+                               pins = "PE1";
+                               function = "csi";
+                       };
+
+                       i2c0_pins: i2c0-pins {
                                pins = "PH0", "PH1";
                                function = "i2c0";
                        };
 
-                       i2c1_pins: i2c1_pins {
+                       i2c1_pins: i2c1-pins {
                                pins = "PH2", "PH3";
                                function = "i2c1";
                        };
 
+                       i2c2_pins: i2c2-pins {
+                               pins = "PE14", "PE15";
+                               function = "i2c2";
+                       };
+
+                       /omit-if-no-ref/
+                       lcd_rgb666_pins: lcd-rgb666-pins {
+                               pins = "PD0", "PD1", "PD2", "PD3", "PD4",
+                                      "PD5", "PD6", "PD7", "PD8", "PD9",
+                                      "PD10", "PD11", "PD12", "PD13",
+                                      "PD14", "PD15", "PD16", "PD17",
+                                      "PD18", "PD19", "PD20", "PD21";
+                               function = "lcd0";
+                       };
+
                        mmc0_pins: mmc0-pins {
                                pins = "PF0", "PF1", "PF2", "PF3",
                                       "PF4", "PF5";
@@ -551,19 +722,19 @@
                                bias-pull-up;
                        };
 
-                       pwm_pin: pwm_pin {
+                       pwm_pin: pwm-pin {
                                pins = "PD22";
                                function = "pwm";
                        };
 
-                       rmii_pins: rmii_pins {
+                       rmii_pins: rmii-pins {
                                pins = "PD10", "PD11", "PD13", "PD14", "PD17",
                                       "PD18", "PD19", "PD20", "PD22", "PD23";
                                function = "emac";
                                drive-strength = <40>;
                        };
 
-                       rgmii_pins: rgmii_pins {
+                       rgmii_pins: rgmii-pins {
                                pins = "PD8", "PD9", "PD10", "PD11", "PD12",
                                       "PD13", "PD15", "PD16", "PD17", "PD18",
                                       "PD19", "PD20", "PD21", "PD22", "PD23";
@@ -571,17 +742,17 @@
                                drive-strength = <40>;
                        };
 
-                       spdif_tx_pin: spdif {
+                       spdif_tx_pin: spdif-tx-pin {
                                pins = "PH8";
                                function = "spdif";
                        };
 
-                       spi0_pins: spi0 {
+                       spi0_pins: spi0-pins {
                                pins = "PC0", "PC1", "PC2", "PC3";
                                function = "spi0";
                        };
 
-                       spi1_pins: spi1 {
+                       spi1_pins: spi1-pins {
                                pins = "PD0", "PD1", "PD2", "PD3";
                                function = "spi1";
                        };
@@ -591,12 +762,12 @@
                                function = "uart0";
                        };
 
-                       uart1_pins: uart1_pins {
+                       uart1_pins: uart1-pins {
                                pins = "PG6", "PG7";
                                function = "uart1";
                        };
 
-                       uart1_rts_cts_pins: uart1_rts_cts_pins {
+                       uart1_rts_cts_pins: uart1-rts-cts-pins {
                                pins = "PG8", "PG9";
                                function = "uart1";
                        };
@@ -638,6 +809,14 @@
                        status = "disabled";
                };
 
+               lradc: lradc@1c21800 {
+                       compatible = "allwinner,sun50i-a64-lradc",
+                                    "allwinner,sun8i-a83t-r-lradc";
+                       reg = <0x01c21800 0x400>;
+                       interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+               };
+
                i2s0: i2s@1c22000 {
                        #sound-dai-cells = <0>;
                        compatible = "allwinner,sun50i-a64-i2s",
@@ -666,6 +845,41 @@
                        status = "disabled";
                };
 
+               dai: dai@1c22c00 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun50i-a64-codec-i2s";
+                       reg = <0x01c22c00 0x200>;
+                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_CODEC>;
+                       dmas = <&dma 15>, <&dma 15>;
+                       dma-names = "rx", "tx";
+                       status = "disabled";
+               };
+
+               codec: codec@1c22e00 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-a33-codec";
+                       reg = <0x01c22e00 0x600>;
+                       interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                       clock-names = "bus", "mod";
+                       status = "disabled";
+               };
+
+               ths: thermal-sensor@1c25000 {
+                       compatible = "allwinner,sun50i-a64-ths";
+                       reg = <0x01c25000 0x100>;
+                       clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+                       clock-names = "bus", "mod";
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&ccu RST_BUS_THS>;
+                       nvmem-cells = <&ths_calibration>;
+                       nvmem-cell-names = "calibration";
+                       #thermal-sensor-cells = <1>;
+               };
+
                uart0: serial@1c28000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x01c28000 0x400>;
@@ -727,6 +941,8 @@
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_I2C0>;
                        resets = <&ccu RST_BUS_I2C0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&i2c0_pins>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -738,6 +954,8 @@
                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_I2C1>;
                        resets = <&ccu RST_BUS_I2C1>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&i2c1_pins>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -749,12 +967,13 @@
                        interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_I2C2>;
                        resets = <&ccu RST_BUS_I2C2>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&i2c2_pins>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
 
-
                spi0: spi@1c68000 {
                        compatible = "allwinner,sun8i-h3-spi";
                        reg = <0x01c68000 0x1000>;
@@ -808,6 +1027,28 @@
                        };
                };
 
+               mali: gpu@1c40000 {
+                       compatible = "allwinner,sun50i-a64-mali", 
"arm,mali-400";
+                       reg = <0x01c40000 0x10000>;
+                       interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "gp",
+                                         "gpmmu",
+                                         "pp0",
+                                         "ppmmu0",
+                                         "pp1",
+                                         "ppmmu1",
+                                         "pmu";
+                       clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+                       clock-names = "bus", "core";
+                       resets = <&ccu RST_BUS_GPU>;
+               };
+
                gic: interrupt-controller@1c81000 {
                        compatible = "arm,gic-400";
                        reg = <0x01c81000 0x1000>,
@@ -830,6 +1071,75 @@
                        status = "disabled";
                };
 
+               mbus: dram-controller@1c62000 {
+                       compatible = "allwinner,sun50i-a64-mbus";
+                       reg = <0x01c62000 0x1000>;
+                       clocks = <&ccu 112>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       dma-ranges = <0x00000000 0x40000000 0xc0000000>;
+                       #interconnect-cells = <1>;
+               };
+
+               csi: csi@1cb0000 {
+                       compatible = "allwinner,sun50i-a64-csi";
+                       reg = <0x01cb0000 0x1000>;
+                       interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CSI>,
+                                <&ccu CLK_CSI_SCLK>,
+                                <&ccu CLK_DRAM_CSI>;
+                       clock-names = "bus", "mod", "ram";
+                       resets = <&ccu RST_BUS_CSI>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&csi_pins>;
+                       status = "disabled";
+               };
+
+               dsi: dsi@1ca0000 {
+                       compatible = "allwinner,sun50i-a64-mipi-dsi";
+                       reg = <0x01ca0000 0x1000>;
+                       interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_MIPI_DSI>;
+                       resets = <&ccu RST_BUS_MIPI_DSI>;
+                       phys = <&dphy>;
+                       phy-names = "dphy";
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port {
+                               dsi_in_tcon0: endpoint {
+                                       remote-endpoint = <&tcon0_out_dsi>;
+                               };
+                       };
+               };
+
+               dphy: d-phy@1ca1000 {
+                       compatible = "allwinner,sun50i-a64-mipi-dphy",
+                                    "allwinner,sun6i-a31-mipi-dphy";
+                       reg = <0x01ca1000 0x1000>;
+                       clocks = <&ccu CLK_BUS_MIPI_DSI>,
+                                <&ccu CLK_DSI_DPHY>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_MIPI_DSI>;
+                       status = "disabled";
+                       #phy-cells = <0>;
+               };
+
+               deinterlace: deinterlace@1e00000 {
+                       compatible = "allwinner,sun50i-a64-deinterlace",
+                                    "allwinner,sun8i-h3-deinterlace";
+                       reg = <0x01e00000 0x20000>;
+                       clocks = <&ccu CLK_BUS_DEINTERLACE>,
+                                <&ccu CLK_DEINTERLACE>,
+                                <&ccu CLK_DRAM_DEINTERLACE>;
+                       clock-names = "bus", "mod", "ram";
+                       resets = <&ccu RST_BUS_DEINTERLACE>;
+                       interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+                       interconnects = <&mbus 9>;
+                       interconnect-names = "dma-mem";
+               };
+
                hdmi: hdmi@1ee0000 {
                        compatible = "allwinner,sun50i-a64-dw-hdmi",
                                     "allwinner,sun8i-a83t-dw-hdmi";
@@ -842,7 +1152,7 @@
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";
                        phys = <&hdmi_phy>;
-                       phy-names = "hdmi-phy";
+                       phy-names = "phy";
                        status = "disabled";
 
                        ports {
@@ -867,7 +1177,7 @@
                        compatible = "allwinner,sun50i-a64-hdmi-phy";
                        reg = <0x01ef0000 0x10000>;
                        clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
-                                <&ccu 7>;
+                                <&ccu CLK_PLL_VIDEO0>;
                        clock-names = "bus", "mod", "pll-0";
                        resets = <&ccu RST_BUS_HDMI0>;
                        reset-names = "phy";
@@ -875,11 +1185,12 @@
                };
 
                rtc: rtc@1f00000 {
-                       compatible = "allwinner,sun6i-a31-rtc";
-                       reg = <0x01f00000 0x54>;
+                       compatible = "allwinner,sun50i-a64-rtc",
+                                    "allwinner,sun8i-h3-rtc";
+                       reg = <0x01f00000 0x400>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-output-names = "rtc-osc32k", "rtc-osc32k-out";
+                       clock-output-names = "osc32k", "osc32k-out", "iosc";
                        clocks = <&osc32k>;
                        #clock-cells = <1>;
                };
@@ -896,13 +1207,19 @@
                r_ccu: clock@1f01400 {
                        compatible = "allwinner,sun50i-a64-r-ccu";
                        reg = <0x01f01400 0x100>;
-                       clocks = <&osc24M>, <&osc32k>, <&iosc>,
-                                <&ccu 11>;
+                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+                                <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                };
 
+               codec_analog: codec-analog@1f015c0 {
+                       compatible = "allwinner,sun50i-a64-codec-analog";
+                       reg = <0x01f015c0 0x4>;
+                       status = "disabled";
+               };
+
                r_i2c: i2c@1f02400 {
                        compatible = "allwinner,sun50i-a64-i2c",
                                     "allwinner,sun6i-a31-i2c";
@@ -915,6 +1232,19 @@
                        #size-cells = <0>;
                };
 
+               r_ir: ir@1f02000 {
+                       compatible = "allwinner,sun50i-a64-ir",
+                                    "allwinner,sun6i-a31-ir";
+                       reg = <0x01f02000 0x400>;
+                       clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
+                       clock-names = "apb", "ir";
+                       resets = <&r_ccu RST_APB0_IR>;
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r_ir_rx_pin>;
+                       status = "disabled";
+               };
+
                r_pwm: pwm@1f03800 {
                        compatible = "allwinner,sun50i-a64-pwm",
                                     "allwinner,sun5i-a13-pwm";
@@ -942,12 +1272,17 @@
                                function = "s_i2c";
                        };
 
-                       r_pwm_pin: pwm {
+                       r_ir_rx_pin: r-ir-rx-pin {
+                               pins = "PL11";
+                               function = "s_cir_rx";
+                       };
+
+                       r_pwm_pin: r-pwm-pin {
                                pins = "PL10";
                                function = "s_pwm";
                        };
 
-                       r_rsb_pins: rsb {
+                       r_rsb_pins: r-rsb-pins {
                                pins = "PL0", "PL1";
                                function = "s_rsb";
                        };
@@ -972,6 +1307,7 @@
                                     "allwinner,sun6i-a31-wdt";
                        reg = <0x01c20ca0 0x20>;
                        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc24M>;
                };
        };
 };
diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h 
b/include/dt-bindings/clock/sun50i-a64-ccu.h
index d66432c6e67..318eb15c414 100644
--- a/include/dt-bindings/clock/sun50i-a64-ccu.h
+++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
@@ -43,8 +43,10 @@
 #ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
 #define _DT_BINDINGS_CLK_SUN50I_A64_H_
 
+#define CLK_PLL_VIDEO0         7
 #define CLK_PLL_PERIPH0                11
 
+#define CLK_CPUX               21
 #define CLK_BUS_MIPI_DSI       28
 #define CLK_BUS_CE             29
 #define CLK_BUS_DMA            30
@@ -129,7 +131,7 @@
 #define CLK_AVS                        109
 #define CLK_HDMI               110
 #define CLK_HDMI_DDC           111
-
+#define CLK_MBUS               112
 #define CLK_DSI_DPHY           113
 #define CLK_GPU                        114
 
diff --git a/include/dt-bindings/clock/sun8i-de2.h 
b/include/dt-bindings/clock/sun8i-de2.h
index 3bed63b524a..7768f73b051 100644
--- a/include/dt-bindings/clock/sun8i-de2.h
+++ b/include/dt-bindings/clock/sun8i-de2.h
@@ -15,4 +15,7 @@
 #define CLK_MIXER1             7
 #define CLK_WB                 8
 
+#define CLK_BUS_ROT            9
+#define CLK_ROT                        10
+
 #endif /* _DT_BINDINGS_CLOCK_SUN8I_DE2_H_ */
diff --git a/include/dt-bindings/reset/sun8i-de2.h 
b/include/dt-bindings/reset/sun8i-de2.h
index 9526017432f..1c36a6ac86d 100644
--- a/include/dt-bindings/reset/sun8i-de2.h
+++ b/include/dt-bindings/reset/sun8i-de2.h
@@ -10,5 +10,6 @@
 #define RST_MIXER0     0
 #define RST_MIXER1     1
 #define RST_WB         2
+#define RST_ROT                3
 
 #endif /* _DT_BINDINGS_RESET_SUN8I_DE2_H_ */
-- 
2.26.2

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