Am 2021-09-01 23:59, schrieb Vladimir Oltean:
> As for pcie->lut itself, simplest would be to just default to what is
> now the "dbi" reg value, plus a .lut_offset determined by compatible
> string, in the case of "fsl,ls1028a-pcie" 0x8, just like Linux.
>
> Ah, and not to mention that the r
On Wed, Sep 01, 2021 at 11:34:50PM +0200, Michael Walle wrote:
> Am 2021-09-01 12:29, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> > > - pcie1: pcie@340 {
> > > -compatible = "fsl,ls-pcie", "fsl,ls1028-pcie",
> > > "s
On Wed, Sep 01, 2021 at 03:30:59PM +0200, Michael Walle wrote:
> Am 2021-09-01 14:57, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 02:38:15PM +0200, Michael Walle wrote:
> > > Am 2021-09-01 14:21, schrieb Vladimir Oltean:
> > > > On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote
Am 2021-09-01 12:29, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
- pcie1: pcie@340 {
- compatible = "fsl,ls-pcie", "fsl,ls1028-pcie",
"snps,dw-pcie";
- reg = <0x00 0x0340 0x0 0x80
Am 2021-09-01 13:27, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
sata: sata@320 {
compatible = "fsl,ls1028a-ahci";
- reg = <0x0 0x320 0x0 0x1 /* ccsr sata base
*/
-
Am 2021-09-01 14:57, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 02:38:15PM +0200, Michael Walle wrote:
Am 2021-09-01 14:21, schrieb Vladimir Oltean:
> On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
> > Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> > > On Wed, Sep 01, 2021
On Wed, Sep 01, 2021 at 02:38:15PM +0200, Michael Walle wrote:
> Am 2021-09-01 14:21, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
> > > Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> > > > On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote
Am 2021-09-01 14:21, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
> > Yes but that is on purpose. In the current u-boot device tree, it was
>
On Wed, Sep 01, 2021 at 02:05:34PM +0200, Michael Walle wrote:
> Am 2021-09-01 13:55, schrieb Vladimir Oltean:
> > On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
> > > Yes but that is on purpose. In the current u-boot device tree, it was
> > > disabled, but the boards reenabled them
Am 2021-09-01 13:55, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
Yes but that is on purpose. In the current u-boot device tree, it was
disabled, but the boards reenabled them again. So it didn't matter.
I want to have a specific sync point (that is th
On Wed, Sep 01, 2021 at 01:51:53PM +0200, Michael Walle wrote:
> Yes but that is on purpose. In the current u-boot device tree, it was
> disabled, but the boards reenabled them again. So it didn't matter.
>
> I want to have a specific sync point (that is the v5.14 tag) for the
> .dtsi. At least wh
Am 2021-09-01 13:24, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
- usb0: usb3@310 {
- compatible = "fsl,layerscape-dwc3";
- reg = <0x0 0x310 0x0 0x1>;
- interru
Am 2021-09-01 13:43, schrieb Vladimir Oltean:
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
- pcie1: pcie@340 {
- ranges = <0x8100 0x0 0x 0x80 0x0002 0x0
0x0001 /* downstream I/O */
- 0x8200 0x0 0x4000 0x80 0x4000 0
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> - pcie1: pcie@340 {
> -ranges = <0x8100 0x0 0x 0x80 0x0002
> 0x0 0x0001 /* downstream I/O */
> -0x8200 0x0 0x4000 0x80 0x4000
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> sata: sata@320 {
> compatible = "fsl,ls1028a-ahci";
> - reg = <0x0 0x320 0x0 0x1/* ccsr sata
> base */
> -0x7 0x100520 0x0 0
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> - usb0: usb3@310 {
> - compatible = "fsl,layerscape-dwc3";
> - reg = <0x0 0x310 0x0 0x1>;
> - interrupts = ;
> - dr_mode = "host";
On Wed, Sep 01, 2021 at 10:55:21AM +0200, Michael Walle wrote:
> - pcie1: pcie@340 {
> -compatible = "fsl,ls-pcie", "fsl,ls1028-pcie",
> "snps,dw-pcie";
> -reg = <0x00 0x0340 0x0 0x8
> -0x00 0x0
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.
Signed-off-by: Michael Walle
---
changes since v1:
- none
arch/arm/dts/fsl-ls1028a.dtsi | 1212 +
.../dt-bindings/clock/fsl,qoriq-clockgen.h| 15 +
2 files changed, 958
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