We experience huge problems with cache handling on Qualcomm systems, and it appears the dcache handling in the DWC3 gadget code is quite wrong and causes operational issues.
This serie fixes the dcache operations on unaligned data, and properly invalidate buffers when reading back data from hardware. Signed-off-by: Neil Armstrong <neil.armstr...@linaro.org> --- Changes in v3: - Cast addresses to (unsigned long) when calling invalidate_dcache_range() - Drop unused CACHELINE_SIZE - Fix warning by casting ctrl to uintptr_r when calling dwc3_invalidate_cache() - Link to v2: https://lore.kernel.org/r/20240724-u-boot-dwc3-gadget-dcache-fixup-v2-0-65836d699...@linaro.org Changes in v2: - Fix typo in drivers/usb/dwc3/core.h and rewrite patch 1 commit message - Link to v1: https://lore.kernel.org/r/20240719-u-boot-dwc3-gadget-dcache-fixup-v1-0-58a5f026e...@linaro.org --- Neil Armstrong (3): usb: dwc3: allocate setup_buf with dma_alloc_coherent() usb: dwc3: fix dcache flush range calculation usb: dwc3: invalidate dcache on buffer used in interrupt handling drivers/usb/dwc3/core.h | 2 ++ drivers/usb/dwc3/ep0.c | 6 ++++-- drivers/usb/dwc3/gadget.c | 10 ++++++---- drivers/usb/dwc3/io.h | 14 ++++++++++++-- 4 files changed, 24 insertions(+), 8 deletions(-) --- base-commit: ddbcafeb53e7093c58488596bfce6d8823777c3a change-id: 20240719-u-boot-dwc3-gadget-dcache-fixup-ea1e92758663 Best regards, -- Neil Armstrong <neil.armstr...@linaro.org>
