On 5/12/23 22:15, Ralph Siemsen wrote:
The RZ/N1 is a family of SoC devices from Renesas, featuring:
* ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
* Integrated SRAM up to 6MB
* Integrated gigabit ethernet switch
* Optional DDR2/3 controller
* I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN,
The RZ/N1 is a family of SoC devices from Renesas, featuring:
* ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
* Integrated SRAM up to 6MB
* Integrated gigabit ethernet switch
* Optional DDR2/3 controller
* I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD
Add basic support for this fam
On 4/24/23 03:15, Ralph Siemsen wrote:
[...]
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 7e7465a2c8..15be32af31 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -31,6 +31,7 @@ void enable_caches(void)
#ifdef
The RZ/N1 is a family of SoC devices from Renesas, featuring:
* ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
* Integrated SRAM up to 6MB
* Integrated gigabit ethernet switch
* Optional DDR2/3 controller
* I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD
Add basic support for this fam
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