[PATCH v5 09/14] clk: sifive: fu540-prci: Add clock initialization for SPL

Set corepll, ddrpll and ethernet PLL for u-boot-spl Signed-off-by: Pragnesh Patel --- drivers/clk/sifive/fu540-prci.c | 94 + 1 file changed, 94 insertions(+) diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c index c02c0466a8..f043b0e

Re: [PATCH v5 09/14] clk: sifive: fu540-prci: Add clock initialization for SPL

On Wed, Mar 11, 2020 at 3:04 PM Pragnesh Patel wrote: > > Set corepll, ddrpll and ethernet PLL for u-boot-spl > > Signed-off-by: Pragnesh Patel > --- > drivers/clk/sifive/fu540-prci.c | 94 + > 1 file changed, 94 insertions(+) > > diff --git a/drivers/clk/sifive/f

RE: [PATCH v5 09/14] clk: sifive: fu540-prci: Add clock initialization for SPL

wski ; Anatolij Gustschin ; Simon >Glass >Subject: Re: [PATCH v5 09/14] clk: sifive: fu540-prci: Add clock >initialization for >SPL > >On Wed, Mar 11, 2020 at 3:04 PM Pragnesh Patel > wrote: >> >> Set corepll, ddrpll and ethernet PLL for u-boot-spl >> >