Hi Sven,
Thanks for your patch.
On Sat, Jan 1, 2022 at 3:47 PM Sven Schwermer wrote:
>
> Similar to what has been done before with c5437e5b for u-boot proper, we
> enable the SMP bit for SPL as well. This is necessary when SDP booting
> straight into Linux, i.e. falcon boot. When SDP boot mode i
Similar to what has been done before with c5437e5b for u-boot proper, we
enable the SMP bit for SPL as well. This is necessary when SDP booting
straight into Linux, i.e. falcon boot. When SDP boot mode is active, the
ROM code does not set this bit which makes the caches not work once
activated in L
2 matches
Mail list logo