Re: [RESEND PATCH v2 10/11] net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip

Hi David On 5/12/20 11:58 AM, David Wu wrote: > The Rockchip CSR clock range is from 100M to 150M, add > EQOS_MAC_MDIO_ADDRESS_CR_100_150. > > Signed-off-by: David Wu > --- > > Changes in v2: > - None > > drivers/net/dwc_eth_qos.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff

[RESEND PATCH v2 10/11] net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip

The Rockchip CSR clock range is from 100M to 150M, add EQOS_MAC_MDIO_ADDRESS_CR_100_150. Signed-off-by: David Wu --- Changes in v2: - None drivers/net/dwc_eth_qos.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h index