From: Nikita Shubin <n.shu...@yadro.com>

U-Boot and SPL don't necessary share the same location, so we might end
with XIP SPL and U-Boot in "normal" memory.

Actually, it seems that we need only hart_lottery and available_harts_lock to 
function like a R/W memory.

May be we should introduce a new section solely for this two locks copy and
initialize it somewhere befor hart lottery or place config variable with 
desired location for locks, but we still end up with a need for a 
"master" hart.

Does anyone have some thoughts about this ?

Nikita Shubin (1):
  spl: introduce SPL_XIP to config

 arch/riscv/cpu/cpu.c                 | 2 +-
 arch/riscv/cpu/start.S               | 4 ++--
 arch/riscv/include/asm/global_data.h | 2 +-
 arch/riscv/lib/asm-offsets.c         | 2 +-
 arch/riscv/lib/smp.c                 | 2 +-
 common/spl/Kconfig                   | 5 +++++
 include/configs/scr7_vcu118.h        | 2 ++
 7 files changed, 13 insertions(+), 6 deletions(-)

-- 
2.35.1

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