On May 27, 2010, at 4:38 PM, Timur Tabi wrote:
On Fri, May 21, 2010 at 4:17 AM, Kumar Gala ga...@kernel.crashing.org wrote:
if (pcie_configured !(devdisr MPC85xx_DEVDISR_PCIE2)) {
+ set_next_law(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M,
+
Kumar Gala wrote:
* tweak SET_STD_PCIE_INFO to track LAW_TRGT_IF_PCIE_n
* add something like the following to fsl_pci_init_port():
struct law_entry law;
law = find_law(pci_info-mem_phys);
if (law.index == -1) {
law.index =
Dear Kumar Gala,
In message 1274433478-31849-2-git-send-email-ga...@kernel.crashing.org you
wrote:
The new is_serdes_configured covers a broader range of devices than the
PCI specific code. Use it instead as we convert away from the
is_fsl_pci_cfg() code.
Additionally move to setting LAWs
On May 27, 2010, at 2:08 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 1274433478-31849-2-git-send-email-ga...@kernel.crashing.org you
wrote:
The new is_serdes_configured covers a broader range of devices than the
PCI specific code. Use it instead as we convert away from the
Dear Kumar Gala,
In message 5f58de0b-6ef8-4ed6-a1a8-c0e37c853...@kernel.crashing.org you wrote:
This is my fault. However not sure what to do about it since we'd break
compatibility with kernel .dts to clean this up.
99% of the u-boot code should match the HW docs. In this one place I
On May 27, 2010, at 6:20 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 5f58de0b-6ef8-4ed6-a1a8-c0e37c853...@kernel.crashing.org you
wrote:
This is my fault. However not sure what to do about it since we'd break
compatibility with kernel .dts to clean this up.
99% of the
Dear Kumar Gala,
In message 7d2ba6a1-2eef-4bf5-8b76-07ad55537...@kernel.crashing.org you wrote:
i. e. the highest number is at the lowest address??
Correct, that is matching FSL HW docs numbering/naming.
in the .dts the alias:
* pci0 is @ 0x8000 - FSL HW calls it PCIE3
* pci1 is @
On May 27, 2010, at 8:20 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 7d2ba6a1-2eef-4bf5-8b76-07ad55537...@kernel.crashing.org you
wrote:
i. e. the highest number is at the lowest address??
Correct, that is matching FSL HW docs numbering/naming.
in the .dts the alias:
*
On Thu, May 27, 2010 at 07:45:16AM -0500, Kumar Gala wrote:
On May 27, 2010, at 6:20 AM, Wolfgang Denk wrote:
Dear Kumar Gala,
In message 5f58de0b-6ef8-4ed6-a1a8-c0e37c853...@kernel.crashing.org you
wrote:
This is my fault. However not sure what to do about it since we'd break
Kumar Gala wrote:
We can do something like:
for (hose = hose_head; hose; hose = hose-next) {
off = fdt_node_offset_by_compatible(blob, -1, pci_compat);
while (off != -FDT_ERR_NOTFOUND) {
const int reg * = fdt_getprop(blob, off, reg,
On Fri, May 21, 2010 at 4:17 AM, Kumar Gala ga...@kernel.crashing.org wrote:
if (pcie_configured !(devdisr MPC85xx_DEVDISR_PCIE2)) {
+ set_next_law(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_512M,
+ LAW_TRGT_IF_PCIE_2);
+
On Fri, May 21, 2010 at 4:17 AM, Kumar Gala ga...@kernel.crashing.org wrote:
#ifdef CONFIG_PCIE3
ft_fsl_pci_setup(blob, pci0, pcie3_hose);
+#else
+ ft_fsl_pci_setup(blob, pci0, NULL);
#endif
What is the reason why CONFIG_PCIE3 setups up the pci node called
pci0? Is it
On Fri, May 21, 2010 at 4:17 AM, Kumar Gala ga...@kernel.crashing.org wrote:
#ifdef CONFIG_PCIE2
- pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel);
+ pcie_configured = is_serdes_configured(PCIE2);
if (pcie_configured !(devdisr MPC85xx_DEVDISR_PCIE2)) {
+
The new is_serdes_configured covers a broader range of devices than the
PCI specific code. Use it instead as we convert away from the
is_fsl_pci_cfg() code.
Additionally move to setting LAWs for PCI based on if its configured.
Also updated PCI FDT fixup code to remove PCI controllers from dtb if
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