On 08/08/2012 15:55, Benoît Thébaudeau wrote:
> The NAND Flash of the KARO TX25 board is a Samsung K9F1G08U0B with 25-ns R/W
> cycle times. However, the NFC clock for this board was set to 66.5 MHz, so
> using
> the NFC driver in symmetric mode (i.e. 1 NFC clock cycle = 1 NF R/W cycle)
> resulted
On 08/08/2012 15:55, Benoît Thébaudeau wrote:
> The NAND Flash of the KARO TX25 board is a Samsung K9F1G08U0B with 25-ns R/W
> cycle times. However, the NFC clock for this board was set to 66.5 MHz, so
> using
> the NFC driver in symmetric mode (i.e. 1 NFC clock cycle = 1 NF R/W cycle)
> resulted
The NAND Flash of the KARO TX25 board is a Samsung K9F1G08U0B with 25-ns R/W
cycle times. However, the NFC clock for this board was set to 66.5 MHz, so using
the NFC driver in symmetric mode (i.e. 1 NFC clock cycle = 1 NF R/W cycle)
resulted in NF R/W cycle times of 15 ns, hence corrupted NF access
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