On Tue, Oct 4, 2011 at 12:32 PM, Jon Medhurst (Tixy)
jon.medhu...@linaro.org wrote:
Cc: Andy Fleming aflem...@gmail.com
Signed-off-by: Jon Medhurst jon.medhu...@linaro.org
drivers/mmc/arm_pl180_mmci.c | 26 --
1 files changed, 0 insertions(+), 26 deletions(-)
diff
On 10/04/2011 11:32 AM, Jon Medhurst (Tixy) wrote:
From: Jon Medhurst jon.medhu...@linaro.org
The new IO FPGA implementation for Versatile Express contains an MMCI
(PL180) cell with the FIFO extended to 128 words. This causes the
read_bytes() function to go into an infinite loop; as it will
Hi Tixy,
One possible fix is to add some build time configuration to change
SDI_FIFO_BURST_SIZE for the new implementation.
You can also detect the configuration in runtime, basing on PeriphID:
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0172a/i1024149.html
Configuration == 0 (ID ==
On Wed, 2011-10-05 at 10:30 +0100, Pawel Moll wrote:
Hi Tixy,
One possible fix is to add some build time configuration to change
SDI_FIFO_BURST_SIZE for the new implementation.
You can also detect the configuration in runtime, basing on PeriphID:
That's useful to know. The PL180 code is also used for U8500, I don't
know if that implements the peripheral ID register; though I guess any
probing could be limited to vexpress anyway.
STE have the same problems with FIFO size, see drivers/mmc/host/mmci.c
in kernel sources:
static struct
On Wed, 2011-10-05 at 10:58 +0100, Pawel Moll wrote:
That's useful to know. The PL180 code is also used for U8500, I don't
know if that implements the peripheral ID register; though I guess any
probing could be limited to vexpress anyway.
STE have the same problems with FIFO size, see
From: Jon Medhurst jon.medhu...@linaro.org
The new IO FPGA implementation for Versatile Express contains an MMCI
(PL180) cell with the FIFO extended to 128 words. This causes the
read_bytes() function to go into an infinite loop; as it will wait for
for the half-full signal (SDI_STA_RXFIFOBR) if
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