On 03/08/2018 08:01 AM, See, Chin Liang wrote:
> On Thu, 2018-03-01 at 17:17 +0100, Marek Vasut wrote:
>> On 02/28/2018 06:12 AM, chin.liang@intel.com wrote:
>>>
>>> From: Chin Liang See
>>>
>>> Enabling cache and TLB maintenance broadcast through ACTLR as
>>> required
>>> by Linux.
>> This
On Thu, 2018-03-01 at 17:17 +0100, Marek Vasut wrote:
> On 02/28/2018 06:12 AM, chin.liang@intel.com wrote:
> >
> > From: Chin Liang See
> >
> > Enabling cache and TLB maintenance broadcast through ACTLR as
> > required
> > by Linux.
> This needs far more clarification. What is the problem y
On 02/28/2018 06:12 AM, chin.liang@intel.com wrote:
> From: Chin Liang See
>
> Enabling cache and TLB maintenance broadcast through ACTLR as required
> by Linux.
This needs far more clarification. What is the problem you're fixing
here ? How does it fix the problem ?
> Signed-off-by: Chin L
From: Chin Liang See
Enabling cache and TLB maintenance broadcast through ACTLR as required
by Linux.
Signed-off-by: Chin Liang See
---
arch/arm/mach-socfpga/misc_gen5.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/misc_gen5.c
b/arch/ar
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