Re: [U-Boot] [PATCH] arm: zynq: zybo z7: fix SPL uart init bitrate

2020-01-19 Thread Michal Simek
On 20. 01. 20 2:32, Luis Araneda wrote: > From: Milan Obuch > > The board uses 100 MHz clock for UART bitrate generator, > but is configured as 50 MHz on defconfig. > > This produces wrong console output. > The first message, "Debug uart enabled" is received as: > "��b" > > Fix the issue

[U-Boot] [PATCH] arm: zynq: zybo z7: fix SPL uart init bitrate

2020-01-19 Thread Luis Araneda
From: Milan Obuch The board uses 100 MHz clock for UART bitrate generator, but is configured as 50 MHz on defconfig. This produces wrong console output. The first message, "Debug uart enabled" is received as: "��b" Fix the issue by configuring the correct clock for the UART baudrate