Dear Jean-Christophe PLAGNIOL-VILLARD,
In message <20090705095925.gf30...@game.jcrosoft.org> you wrote:
>
> > Can you please fix the commit message? "fot" is obviously a typo;
> > I guess it should read "for" ? Thanks.
> please accept it as this, I other patch applied over it and I prefer to not
On 01:06 Sun 05 Jul , Wolfgang Denk wrote:
> Dear Jean-Christophe PLAGNIOL-VILLARD,
>
> In message <20090627152133.gj8...@game.jcrosoft.org> you wrote:
> > On 10:32 Wed 24 Jun , Sedji Gaouaou wrote:
> > > On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc
> > > register was
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message <20090627152133.gj8...@game.jcrosoft.org> you wrote:
> On 10:32 Wed 24 Jun , Sedji Gaouaou wrote:
> > On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register
> > was set to 0 after being set to 500 ms for the PHY reset.
> >
On 10:32 Wed 24 Jun , Sedji Gaouaou wrote:
> On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register
> was set to 0 after being set to 500 ms for the PHY reset.
> Do backup the old reset length and restore it after the MACB initialisation.
>
> Signed-off-by: Sedji Gaouaou
Hi Sedji,
On Wed, Jun 24, 2009 at 10:32:09AM +0200, Sedji Gaouaou wrote:
> On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register
> was set to 0 after being set to 500 ms for the PHY reset.
> Do backup the old reset length and restore it after the MACB initialisation.
>
> Si
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.
Signed-off-by: Sedji Gaouaou
---
board/afeb9260/afeb9260.c |6 +++
Stelian Pop a écrit :
> On Tue, Jun 23, 2009 at 12:46:50PM +0200, Sedji Gaouaou wrote:
>
>> On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register
>> was
>> set to 0 after being set to 500 ms for the PHY reset.
>> Now if back up is enable it will be set to the saved value.
>
On Tue, Jun 23, 2009 at 12:46:50PM +0200, Sedji Gaouaou wrote:
> On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
> set to 0 after being set to 500 ms for the PHY reset.
> Now if back up is enable it will be set to the saved value.
The changelog message is not very c
On 12:46 Tue 23 Jun , Sedji Gaouaou wrote:
> On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
> set to 0 after being set to 500 ms for the PHY reset.
> Now if back up is enable it will be set to the saved value.
>
> Signed-off-by: Sedji Gaouaou
> ---
> board/afe
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Now if back up is enable it will be set to the saved value.
Signed-off-by: Sedji Gaouaou
---
board/afeb9260/afeb9260.c |6 +-
board/atmel/a
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