On 16 March 2016 at 16:37, Purna Chandra Mandal
wrote:
> On 03/15/2016 05:35 PM, Jagan Teki wrote:
>
>> On 14 March 2016 at 19:37, Purna Chandra Mandal
>> wrote:
>>> Jagan.
>>>
>>> On 03/14/2016 07:16 PM, Jagan Teki wrote:
>>>
On Monday 14 March 2016 07:00 PM, Purna Chandra Mandal wrote:
>>>
On 03/15/2016 05:35 PM, Jagan Teki wrote:
> On 14 March 2016 at 19:37, Purna Chandra Mandal
> wrote:
>> Jagan.
>>
>> On 03/14/2016 07:16 PM, Jagan Teki wrote:
>>
>>> On Monday 14 March 2016 07:00 PM, Purna Chandra Mandal wrote:
On 03/14/2016 06:13 PM, Daniel Schwierzeck wrote:
> 2016-03-
On 14 March 2016 at 19:37, Purna Chandra Mandal
wrote:
> Jagan.
>
> On 03/14/2016 07:16 PM, Jagan Teki wrote:
>
>> On Monday 14 March 2016 07:00 PM, Purna Chandra Mandal wrote:
>>> On 03/14/2016 06:13 PM, Daniel Schwierzeck wrote:
2016-03-10 14:12 GMT+01:00 Purna Chandra Mandal
:
>
Jagan.
On 03/14/2016 07:16 PM, Jagan Teki wrote:
> On Monday 14 March 2016 07:00 PM, Purna Chandra Mandal wrote:
>> On 03/14/2016 06:13 PM, Daniel Schwierzeck wrote:
>>> 2016-03-10 14:12 GMT+01:00 Purna Chandra Mandal
>>> :
PIC32 embedded flash banks are memory mapped, directly read by CPU,
On Monday 14 March 2016 07:00 PM, Purna Chandra Mandal wrote:
On 03/14/2016 06:13 PM, Daniel Schwierzeck wrote:
2016-03-10 14:12 GMT+01:00 Purna Chandra Mandal :
PIC32 embedded flash banks are memory mapped, directly read by CPU,
and programming (erase followed by write) operation on them are
On 03/14/2016 06:13 PM, Daniel Schwierzeck wrote:
> 2016-03-10 14:12 GMT+01:00 Purna Chandra Mandal :
>> PIC32 embedded flash banks are memory mapped, directly read by CPU,
>> and programming (erase followed by write) operation on them are
>> handled by on-chip NVM controller.
>>
>> Signed-off-by:
2016-03-10 14:12 GMT+01:00 Purna Chandra Mandal :
> PIC32 embedded flash banks are memory mapped, directly read by CPU,
> and programming (erase followed by write) operation on them are
> handled by on-chip NVM controller.
>
> Signed-off-by: Purna Chandra Mandal
>
> ---
>
> drivers/mtd/Kconfig
On 03/10/2016 07:11 PM, Jagan Teki wrote:
> On Thursday 10 March 2016 06:42 PM, Purna Chandra Mandal wrote:
>> PIC32 embedded flash banks are memory mapped, directly read by CPU,
>> and programming (erase followed by write) operation on them are
>> handled by on-chip NVM controller.
>
> Can you ple
On Thursday 10 March 2016 06:42 PM, Purna Chandra Mandal wrote:
PIC32 embedded flash banks are memory mapped, directly read by CPU,
and programming (erase followed by write) operation on them are
handled by on-chip NVM controller.
Can you please add some more description to understand bit more,
PIC32 embedded flash banks are memory mapped, directly read by CPU,
and programming (erase followed by write) operation on them are
handled by on-chip NVM controller.
Signed-off-by: Purna Chandra Mandal
---
drivers/mtd/Kconfig | 6 +
drivers/mtd/Makefile | 1 +
drivers/mtd/pic32
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