Re: [U-Boot] [PATCH] fsl_esdhc: Do not clear interrupt status bits until data processed

On 11.06.2013 17:34, Andrew Gabbasov wrote: After waiting for the command completion event, the interrupt status bits, that occured to be set by that time, are cleared by writing them back. It is supposed, that it should be command related bits (command complete and may be command errors). Howev

[U-Boot] [PATCH] fsl_esdhc: Do not clear interrupt status bits until data processed

After waiting for the command completion event, the interrupt status bits, that occured to be set by that time, are cleared by writing them back. It is supposed, that it should be command related bits (command complete and may be command errors). However, in some cases the DMA already completes by