Re: [U-Boot] [PATCH] net/designware: make driver compatible with data cache

2013-12-24 Thread Mischa Jonker
Hi Alexey, > * Implement all accesses to shared structures between CPU and GMAC via > uncached reads/writes ("readl"/"writel"). I don't know how ARC exactly implements this for u-boot, but AFAIK, readl/writel are meant for 'strongly ordered' I/O writes, not necessarily uncached. The uncached p

[U-Boot] [PATCH] net/designware: make driver compatible with data cache

2013-12-24 Thread Alexey Brodkin
Up until now this driver only worked with data cache disabled. To make it work with enabled data cache following changes were required: * Implement all accesses to shared structures between CPU and GMAC via uncached reads/writes ("readl"/"writel"). * Flush cache for data passed from CPU to GMAC