Re: [U-Boot] [PATCH] powerpc/mpc85xx: 32bit DDR changes for P1020/P1011

2014-05-13 Thread York Sun
On 05/12/2014 10:50 PM, Prabhakar Kushwaha wrote: > The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010 > where max DDR data width supported is 64bit. > > Add dynamic DDR size adjustment in second stage boot loader execution. > > Signed-off-by: Prabhakar Kushwaha > --- >

[U-Boot] [PATCH] powerpc/mpc85xx: 32bit DDR changes for P1020/P1011

2014-05-12 Thread Prabhakar Kushwaha
The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010 where max DDR data width supported is 64bit. Add dynamic DDR size adjustment in second stage boot loader execution. Signed-off-by: Prabhakar Kushwaha --- arch/powerpc/cpu/mpc85xx/cpu.c |7 ++- 1 file changed, 6 i