On 10/17/2017 08:19 AM, York Sun wrote:
> Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
> erratum A-007907") clears L1CSR2 for the boot core, but other cores
> don't run through the workaround. Add similar code for secondary
> cores to clear DCSTASHID field in L1CSR2 registe
Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.
Signed-off-by: York Sun
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arch/powerpc/
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