On Sunday 27 September 2009 23:56:12 Felix Radensky wrote:
> Reorganize DDR2 ECC handling to use common code for
> SPD DIMMs and soldered SDRAM. Also, use common code
> to display SDRAM info (ECC, CAS latency) for SPD and
> soldered SDRAM variants.
Applied to u-boot-ppc4xx/master. Thanks.
Cheers,
Hi Felix,
On Sunday 27 September 2009 23:56:12 Felix Radensky wrote:
> Reorganize DDR2 ECC handling to use common code for
> SPD DIMMs and soldered SDRAM. Also, use common code
> to display SDRAM info (ECC, CAS latency) for SPD and
> soldered SDRAM variants.
Thanks. This is a first step into cons
Reorganize DDR2 ECC handling to use common code for
SPD DIMMs and soldered SDRAM. Also, use common code
to display SDRAM info (ECC, CAS latency) for SPD and
soldered SDRAM variants.
Signed-off-by: Felix Radensky
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cpu/ppc4xx/44x_spd_ddr2.c | 456
i
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