From: Thierry Reding
For Tegra186 there are currently no UART clocks wired up in device tree.
This exposes a regression introduced in commit 50fce1d5d874 ("serial:
ns16550: Support clocks via phandle"), which causes the p2771--500
board (and probably any Tegra186-based board as well) to fail
On 09/30/2016 05:46 PM, Thierry Reding wrote:
> From: Thierry Reding
>
> For Tegra186 there are currently no UART clocks wired up in device tree.
> This exposes a regression introduced in commit 50fce1d5d874 ("serial:
> ns16550: Support clocks via phandle"), which causes the p2771--500
> boar
On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote:
> On 09/30/2016 05:46 PM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > For Tegra186 there are currently no UART clocks wired up in device tree.
> > This exposes a regression introduced in commit 50fce1d5d874 ("serial:
>
Hi Paul,
On 09/30/2016 06:47 PM, Paul Burton wrote:
> * PGP Signed by an unknown key
>
> On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote:
>> On 09/30/2016 05:46 PM, Thierry Reding wrote:
>>> From: Thierry Reding
>>>
>>> For Tegra186 there are currently no UART clocks wired up i
On Fri, Sep 30, 2016 at 10:47:38AM +0100, Paul Burton wrote:
> On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote:
> > On 09/30/2016 05:46 PM, Thierry Reding wrote:
> > > From: Thierry Reding
> > >
> > > For Tegra186 there are currently no UART clocks wired up in device tree.
> > >
On 09/30/2016 02:46 AM, Thierry Reding wrote:
From: Thierry Reding
For Tegra186 there are currently no UART clocks wired up in device tree.
This exposes a regression introduced in commit 50fce1d5d874 ("serial:
ns16550: Support clocks via phandle"), which causes the p2771--500
board (and pro
On 10/03/2016 09:51 AM, Stephen Warren wrote:
On 09/30/2016 02:46 AM, Thierry Reding wrote:
From: Thierry Reding
For Tegra186 there are currently no UART clocks wired up in device tree.
This exposes a regression introduced in commit 50fce1d5d874 ("serial:
ns16550: Support clocks via phandle"),
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