[U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-09-30 Thread Thierry Reding
From: Thierry Reding For Tegra186 there are currently no UART clocks wired up in device tree. This exposes a regression introduced in commit 50fce1d5d874 ("serial: ns16550: Support clocks via phandle"), which causes the p2771--500 board (and probably any Tegra186-based board as well) to fail

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-09-30 Thread Alexandre Courbot
On 09/30/2016 05:46 PM, Thierry Reding wrote: > From: Thierry Reding > > For Tegra186 there are currently no UART clocks wired up in device tree. > This exposes a regression introduced in commit 50fce1d5d874 ("serial: > ns16550: Support clocks via phandle"), which causes the p2771--500 > boar

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-09-30 Thread Paul Burton
On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote: > On 09/30/2016 05:46 PM, Thierry Reding wrote: > > From: Thierry Reding > > > > For Tegra186 there are currently no UART clocks wired up in device tree. > > This exposes a regression introduced in commit 50fce1d5d874 ("serial: >

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-09-30 Thread Alexandre Courbot
Hi Paul, On 09/30/2016 06:47 PM, Paul Burton wrote: > * PGP Signed by an unknown key > > On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote: >> On 09/30/2016 05:46 PM, Thierry Reding wrote: >>> From: Thierry Reding >>> >>> For Tegra186 there are currently no UART clocks wired up i

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-09-30 Thread Thierry Reding
On Fri, Sep 30, 2016 at 10:47:38AM +0100, Paul Burton wrote: > On Friday, 30 September 2016 17:53:38 BST Alexandre Courbot wrote: > > On 09/30/2016 05:46 PM, Thierry Reding wrote: > > > From: Thierry Reding > > > > > > For Tegra186 there are currently no UART clocks wired up in device tree. > > >

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-10-03 Thread Stephen Warren
On 09/30/2016 02:46 AM, Thierry Reding wrote: From: Thierry Reding For Tegra186 there are currently no UART clocks wired up in device tree. This exposes a regression introduced in commit 50fce1d5d874 ("serial: ns16550: Support clocks via phandle"), which causes the p2771--500 board (and pro

Re: [U-Boot] [PATCH] serial: ns16550: Fix serial output on Tegra186

2016-10-03 Thread Stephen Warren
On 10/03/2016 09:51 AM, Stephen Warren wrote: On 09/30/2016 02:46 AM, Thierry Reding wrote: From: Thierry Reding For Tegra186 there are currently no UART clocks wired up in device tree. This exposes a regression introduced in commit 50fce1d5d874 ("serial: ns16550: Support clocks via phandle"),