* Stephen Warren wrote:
> On 05/24/2012 03:03 PM, Thierry Reding wrote:
> > On Tamonten, U-Boot doesn't execute properly. Or at least I can't
> > tell because it may just be that there is no output whatsoever on
> > the serial port (perhaps due to the peripheral clock being
> > configured wrongly?)
On 05/24/2012 03:03 PM, Thierry Reding wrote:
> * Stephen Warren wrote:
>> On 05/24/2012 01:03 AM, Thierry Reding wrote:
>>> Upon reset, the CRC_OSC_CTRL register defaults to a 13 MHz
>>> oscillator input frequency. With Lucas' recent commit b8cb519
>>> ("tegra2: trivially enable 13 mhz crystal fre
* Stephen Warren wrote:
> On 05/24/2012 01:03 AM, Thierry Reding wrote:
> > Upon reset, the CRC_OSC_CTRL register defaults to a 13 MHz oscillator
> > input frequency. With Lucas' recent commit b8cb519 ("tegra2: trivially
> > enable 13 mhz crystal frequency) applied, this breaks on hardware that
> >
On 05/24/2012 01:03 AM, Thierry Reding wrote:
> Upon reset, the CRC_OSC_CTRL register defaults to a 13 MHz oscillator
> input frequency. With Lucas' recent commit b8cb519 ("tegra2: trivially
> enable 13 mhz crystal frequency) applied, this breaks on hardware that
> provides a different frequency.
Upon reset, the CRC_OSC_CTRL register defaults to a 13 MHz oscillator
input frequency. With Lucas' recent commit b8cb519 ("tegra2: trivially
enable 13 mhz crystal frequency) applied, this breaks on hardware that
provides a different frequency.
The Tegra clock and reset controller provides a means
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