On Thu, Aug 14, 2014 at 6:08 PM, Stefan Agner ste...@agner.ch wrote:
Am 2014-07-22 00:42, schrieb Stefan Agner:
I would like to see this merged since it really fixes a lot of
wrong/undocumented access in the RAM initialization code. It looks like
the original code was copied from some other
Am 2014-07-22 00:42, schrieb Stefan Agner:
Am 2014-05-14 23:29, schrieb Anthony Felice:
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Am 2014-05-14 23:29, schrieb Anthony Felice:
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they
Hi Albert,
On Mon, 9 Jun 2014 10:11:28 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hi Anthony,
On Wed, 14 May 2014 17:29:48 -0400, Anthony Felice
tony.fel...@timesys.com wrote:
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were
Hi Anthony,
On Wed, 14 May 2014 17:29:48 -0400, Anthony Felice
tony.fel...@timesys.com wrote:
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they included full clock
periods that were doing nothing.
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