On Fri, Dec 29, 2017 at 6:05 PM, Prabhakar Kushwaha
wrote:
> Hi Jagan,
>
>
>> -Original Message-
>> From: Prabhakar Kushwaha [mailto:prabhakar.kushw...@nxp.com]
>> Sent: Thursday, December 21, 2017 5:43 PM
>> To: u-boot@lists.denx.de
>> Cc:
Hi Jagan,
> -Original Message-
> From: Prabhakar Kushwaha [mailto:prabhakar.kushw...@nxp.com]
> Sent: Thursday, December 21, 2017 5:43 PM
> To: u-boot@lists.denx.de
> Cc: jagannadh.t...@gmail.com; Poonam Aggrwal
> ; Suresh Gupta ;
>
SPI-NOR framework currently supports-
- (1-1-1, 1-1-2, 1-1-4) read protocols
- read latency(dummy bytes) are hardcoded with the assumption
that the flash would support it.
- No support of mode bits.
- No support of flash size above 128Mib
This patch set add support of 1-2-2, 1-4-4 read
SPI-NOR framework currently supports-
- (1-1-1, 1-1-2, 1-1-4) read protocols
- read latency(dummy bytes) are hardcoded with the assumption
that the flash would support it.
- No support of mode bits.
- No support of flash size above 128Mib
This patch set add support of 1-2-2, 1-4-4 read
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