This patchset fixes few bugs in the existing s3c24x0.c code (standard i2c)
and add support for High-speed i2c bus controller available on Exynos5 SoCs
from Samsung.
Exynos5250 channels [0 ~ 3] can configured for I2C contoller or
new HSI2C controller
channels [3 ~ 7] are stand
Hello Naveen,
Am 30.09.2013 08:58, schrieb Naveen Krishna Chatradhi:
This patchset fixes few bugs in the existing s3c24x0.c code (standard i2c)
and add support for High-speed i2c bus controller available on Exynos5 SoCs
from Samsung.
Exynos5250 channels [0 ~ 3] can configured for I2C contoller
Helo Heiko,
Thanks for timely reply.
On 30 September 2013 13:35, Heiko Schocher wrote:
> Hello Naveen,
>
> Am 30.09.2013 08:58, schrieb Naveen Krishna Chatradhi:
>
>> This patchset fixes few bugs in the existing s3c24x0.c code (standard i2c)
>> and add support for High-speed i2c bus controller a
Hello Naveen,
Am 30.09.2013 12:03, schrieb Naveen Krishna Ch:
Helo Heiko,
Thanks for timely reply.
On 30 September 2013 13:35, Heiko Schocher wrote:
Hello Naveen,
Am 30.09.2013 08:58, schrieb Naveen Krishna Chatradhi:
This patchset fixes few bugs in the existing s3c24x0.c code (standard i
Hello Naveen,
Am 01.10.2013 08:19, schrieb Naveen Krishna Ch:
Hello Heiko,
On 1 October 2013 11:35, Heiko Schocher wrote:
Hello Naveen,
Am 30.09.2013 12:03, schrieb Naveen Krishna Ch:
Helo Heiko,
Thanks for timely reply.
On 30 September 2013 13:35, Heiko Schocher wrote:
Hello Naveen,
Hello Heiko,
On 1 October 2013 11:35, Heiko Schocher wrote:
> Hello Naveen,
>
> Am 30.09.2013 12:03, schrieb Naveen Krishna Ch:
>
>> Helo Heiko,
>>
>> Thanks for timely reply.
>>
>> On 30 September 2013 13:35, Heiko Schocher wrote:
>>>
>>> Hello Naveen,
>>>
>>> Am 30.09.2013 08:58, schrieb Navee
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