[U-Boot] [PATCH 0/8] MIPS cache code cleanup

This series cleans up the MIPS cache code somewhat, and unifies the mips32 & mips64 implementations of it. This is largely in preparation for further patches adding L2 cache support. The final patch of this series fixes a bug encountered with recent cores on Malta boards. Paul Burton (8): MIPS:

Re: [U-Boot] [PATCH 0/8] MIPS cache code cleanup

Hi Paul, Am 26.01.2015 um 16:02 schrieb Paul Burton: > This series cleans up the MIPS cache code somewhat, and unifies the > mips32 & mips64 implementations of it. This is largely in preparation > for further patches adding L2 cache support. The final patch of this > series fixes a bug encountered

Re: [U-Boot] [PATCH 0/8] MIPS cache code cleanup

On Wed, Jan 28, 2015 at 09:31:25PM +0100, Daniel Schwierzeck wrote: > Hi Paul, > > Am 26.01.2015 um 16:02 schrieb Paul Burton: > > This series cleans up the MIPS cache code somewhat, and unifies the > > mips32 & mips64 implementations of it. This is largely in preparation > > for further patches a

Re: [U-Boot] [PATCH 0/8] MIPS cache code cleanup

On Wed, Jan 28, 2015 at 10:27:47PM +0100, Daniel Schwierzeck wrote: > Am 28.01.2015 um 22:05 schrieb Paul Burton: > > On Wed, Jan 28, 2015 at 09:31:25PM +0100, Daniel Schwierzeck wrote: > >> Hi Paul, > >> > >> Am 26.01.2015 um 16:02 schrieb Paul Burton: > >>> This series cleans up the MIPS cache co