This entire RFC series is the first stab at making SoCFPGA usable with
mainline U-Boot again. There are still some bits missing, but in general,
this allows me to use mainline U-Boot on my SoCFPGA systems. The big
missing part is the SPL generation, which still needs a lot of additional
work.
This
Hi!
On Mon 2014-09-15 13:05:53, Marek Vasut wrote:
> This entire RFC series is the first stab at making SoCFPGA usable with
> mainline U-Boot again. There are still some bits missing, but in general,
> this allows me to use mainline U-Boot on my SoCFPGA systems. The big
> missing part is the SPL g
On 09/16/2014 08:18 AM, Pavel Machek wrote:
> Hi!
>
> On Mon 2014-09-15 13:05:53, Marek Vasut wrote:
>> This entire RFC series is the first stab at making SoCFPGA usable with
>> mainline U-Boot again. There are still some bits missing, but in general,
>> this allows me to use mainline U-Boot on my
On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
> On 09/16/2014 08:18 AM, Pavel Machek wrote:
> > Hi!
> >
> > On Mon 2014-09-15 13:05:53, Marek Vasut wrote:
> >> This entire RFC series is the first stab at making SoCFPGA usable with
> >> mainline U-Boot again. There are still som
On Tue, 16 Sep 2014, Marek Vasut wrote:
> On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
> > On 09/16/2014 08:18 AM, Pavel Machek wrote:
> > > Hi!
> > >
> > > On Mon 2014-09-15 13:05:53, Marek Vasut wrote:
> > >> This entire RFC series is the first stab at making SoCFPGA usab
On Tue, 16 Sep 2014, Marek Vasut wrote:
> On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
> > On 09/16/2014 08:18 AM, Pavel Machek wrote:
> > > Hi!
> > >
> > > On Mon 2014-09-15 13:05:53, Marek Vasut wrote:
> > >> This entire RFC series is the first stab at making SoCFPGA usab
On Tuesday, September 16, 2014 at 11:35:38 PM, dinguyen wrote:
> On Tue, 16 Sep 2014, Marek Vasut wrote:
> > On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
> > > On 09/16/2014 08:18 AM, Pavel Machek wrote:
> > > > Hi!
> > > >
> > > > On Mon 2014-09-15 13:05:53, Marek Vasut wrote
On Tuesday, September 16, 2014 at 11:29:45 PM, dinguyen wrote:
> On Tue, 16 Sep 2014, Marek Vasut wrote:
> > On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
> > > On 09/16/2014 08:18 AM, Pavel Machek wrote:
> > > > Hi!
> > > >
> > > > On Mon 2014-09-15 13:05:53, Marek Vasut wrote
On 09/16/2014 04:46 PM, Marek Vasut wrote:
> On Tuesday, September 16, 2014 at 11:35:38 PM, dinguyen wrote:
>> On Tue, 16 Sep 2014, Marek Vasut wrote:
>>> On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
On 09/16/2014 08:18 AM, Pavel Machek wrote:
> Hi!
>
> On Mon
On 09/16/2014 04:55 PM, Marek Vasut wrote:
> On Tuesday, September 16, 2014 at 11:29:45 PM, dinguyen wrote:
>> On Tue, 16 Sep 2014, Marek Vasut wrote:
>>> On Tuesday, September 16, 2014 at 06:28:52 PM, Dinh Nguyen wrote:
On 09/16/2014 08:18 AM, Pavel Machek wrote:
> Hi!
>
> On Mon
On Wednesday, September 17, 2014 at 12:29:54 AM, Dinh Nguyen wrote:
[...]
> >> Yes, tracked it down to get_ram_size(). I forced gd->ram_size to 1GB and
> >> it works fine for me now. I'll try to spend some cycles to debug the
> >> problem.
> >
> > Hm, how much DRAM can the SoCFPGA chip drive
On Wednesday, September 17, 2014 at 12:20:34 AM, Dinh Nguyen wrote:
[...]
> >> Using default environment
> >>
> >> In:serial
> >> Out: serial
> >> Err: serial
> >> Net: dwmac.ff702000
> >> Error: dwmac.ff702000 address not set.
> >> ^
> >>
> >> Do you see this on your side? I can tr
Dear Marek,
In message <201409162355.1.ma...@denx.de> you wrote:
>
> ... For the get_ram_size(), the read
> from the unpopulated DRAM space contains zeroes ...
Reading from non-existent memory is not guaranteed to return zeroes,
nor any other specif
On Wed, 2014-09-17 at 01:52 +0200, ma...@denx.de wrote:
> On Wednesday, September 17, 2014 at 12:29:54 AM, Dinh Nguyen wrote:
>
> [...]
>
> > >> Yes, tracked it down to get_ram_size(). I forced gd->ram_size to 1GB and
> > >> it works fine for me now. I'll try to spend some cycles to debug the
> >
On Mon, 2014-09-15 at 13:05 +0200, ma...@denx.de wrote:
> This entire RFC series is the first stab at making SoCFPGA usable with
> mainline U-Boot again. There are still some bits missing, but in general,
> this allows me to use mainline U-Boot on my SoCFPGA systems. The big
> missing part is the S
On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
[...]
> A quick test from my side and result as below:
>
> 1. SDRAM access is working where I can read and write to few spots. :)
>
> SOCFPGA_CYCLONE5 # md 0
> :
On Wed, 2014-09-17 at 13:52 +0200, ma...@denx.de wrote:
> On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
> [...]
> > A quick test from my side and result as below:
> >
> > 1. SDRAM access is working where I can read and write to few spots. :)
> >
> > SOCFPGA_CYCLONE5 # md
On Wednesday, September 17, 2014 at 02:00:42 PM, Chin Liang See wrote:
> On Wed, 2014-09-17 at 13:52 +0200, ma...@denx.de wrote:
> > On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
> > [...]
> >
> > > A quick test from my side and result as below:
> > >
> > > 1. SDRAM acces
On Wednesday, September 17, 2014 at 01:07:29 PM, Chin Liang See wrote:
> On Wed, 2014-09-17 at 01:52 +0200, ma...@denx.de wrote:
> > On Wednesday, September 17, 2014 at 12:29:54 AM, Dinh Nguyen wrote:
> >
> > [...]
> >
> > > >> Yes, tracked it down to get_ram_size(). I forced gd->ram_size to 1GB
Dear Chin Liang See,
In message <1410952049.7769.11.ca...@clsee-virtualbox.altera.com> you wrote:
>
> Hmmm... actually I can get it works well for my Altera dev kit. The
> get_dram_size would take in the argument PHYS_SDRAM_1_SIZE. From here,
> the function will ensure the memory specified can rea
Hi!
> What board are doing your testing on? The Arrow Sockit?
I have board similar to SocKit, yes.
> I also see this error print:
>
> U-Boot 2014.10-rc2-00139-g70e9e3e-dirty (Sep 16 2014 - 16:26:56)
>
> CPU: Altera SoCFPGA Platform
> BOARD: Altera SoCFPGA Cyclone5 Board
>Watchdog ena
Hi Marek,
On Wed, 2014-09-17 at 14:39 +0200, ma...@denx.de wrote:
> On Wednesday, September 17, 2014 at 02:00:42 PM, Chin Liang See wrote:
> > On Wed, 2014-09-17 at 13:52 +0200, ma...@denx.de wrote:
> > > On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
> > > > 3. MMC is not
Dear Wolfgang,
On Wed, 2014-09-17 at 16:11 +0200, ZY - wd wrote:
> Dear Chin Liang See,
>
> In message <1410952049.7769.11.ca...@clsee-virtualbox.altera.com> you wrote:
> >
> > Hmmm... actually I can get it works well for my Altera dev kit. The
> > get_dram_size would take in the argument PHYS_SD
Hi guys,
On Fri, 2014-09-19 at 04:32 -0500, Chin Liang See wrote:
> Hi Marek,
>
> On Wed, 2014-09-17 at 14:39 +0200, ma...@denx.de wrote:
> > On Wednesday, September 17, 2014 at 02:00:42 PM, Chin Liang See wrote:
> > > On Wed, 2014-09-17 at 13:52 +0200, ma...@denx.de wrote:
> > > > On Wednesday,
On Friday, September 19, 2014 at 12:36:41 PM, Chin Liang See wrote:
> Hi guys,
>
> On Fri, 2014-09-19 at 04:32 -0500, Chin Liang See wrote:
> > Hi Marek,
> >
> > On Wed, 2014-09-17 at 14:39 +0200, ma...@denx.de wrote:
> > > On Wednesday, September 17, 2014 at 02:00:42 PM, Chin Liang See wrote:
>
On Friday, September 19, 2014 at 11:44:48 AM, Chin Liang See wrote:
> Dear Wolfgang,
>
> On Wed, 2014-09-17 at 16:11 +0200, ZY - wd wrote:
> > Dear Chin Liang See,
> >
> > In message <1410952049.7769.11.ca...@clsee-virtualbox.altera.com> you wrote:
> > > Hmmm... actually I can get it works well f
On Friday, September 19, 2014 at 01:12:23 PM, Marek Vasut wrote:
> On Friday, September 19, 2014 at 11:44:48 AM, Chin Liang See wrote:
> > Dear Wolfgang,
> >
> > On Wed, 2014-09-17 at 16:11 +0200, ZY - wd wrote:
> > > Dear Chin Liang See,
> > >
> > > In message <1410952049.7769.11.ca...@clsee-vir
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