On Tue, Oct 28, 2008 at 4:53 AM, Dave Liu <[EMAIL PROTECTED]> wrote:
> The DDR controller of 8548/8544/8568/8572/8536 processors
> have the ECC data init feature, and the new DDR code is
> using the feature, and we don't need the way with DMA to
> init memory any more.
>
> Signed-off-by: Dave Liu <
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
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board/atum8548/atum8548.c | 10 -
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