Re: [U-Boot] [PATCH 1/2] armv8: Fix TCR macros for shareability attribute

On 06/29/2015 12:49 AM, Alison Wang wrote: > From: Zhichun Hua > > For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit > position [13:12] of TCR_ELx register. > > Signed-off-by: Zhichun Hua > Signed-off-by: York Sun > --- Applied to u-boot-fsl-qoriq master branch. York

[U-Boot] [PATCH 1/2] armv8: Fix TCR macros for shareability attribute

From: Zhichun Hua For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit position [13:12] of TCR_ELx register. Signed-off-by: Zhichun Hua Signed-off-by: York Sun --- arch/arm/include/asm/armv8/mmu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/i