On Thu, 2009-09-03 at 08:25 -0500, Kumar Gala wrote:
> On Aug 7, 2009, at 3:57 PM, Peter Tyser wrote:
>
> >
> >>> diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
> >>> index 76f02a4..53fc3be 100644
> >>> --- a/cpu/mpc85xx/mp.c
> >>> +++ b/cpu/mpc85xx/mp.c
> >>> @@ -129,7 +129,7 @@ ulong get_spin_
On Aug 7, 2009, at 3:57 PM, Peter Tyser wrote:
>
>>> diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
>>> index 76f02a4..53fc3be 100644
>>> --- a/cpu/mpc85xx/mp.c
>>> +++ b/cpu/mpc85xx/mp.c
>>> @@ -129,7 +129,7 @@ ulong get_spin_addr(void)
>>>
>>> ulong addr =
>>> (ulong)&__spin_t
> > diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
> > index 76f02a4..53fc3be 100644
> > --- a/cpu/mpc85xx/mp.c
> > +++ b/cpu/mpc85xx/mp.c
> > @@ -129,7 +129,7 @@ ulong get_spin_addr(void)
> >
> > ulong addr =
> > (ulong)&__spin_table - (ulong)&__secondary_start_page;
> > - add
On Aug 5, 2009, at 5:23 PM, Peter Tyser wrote:
> Previously, when CONFIG_MP was defined Boot Page Translation was
> unconditionally enabled and secondary cores were put in a spin loop at
> address 0xf000. The 0xfxxx address range (ie the Boot Page)
> was
> being remapped to SDRAM via t
Previously, when CONFIG_MP was defined Boot Page Translation was
unconditionally enabled and secondary cores were put in a spin loop at
address 0xf000. The 0xfxxx address range (ie the Boot Page) was
being remapped to SDRAM via the BPTR register.
This change puts secondary cores into spin
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