On Wed, Feb 04, 2015 at 09:48:32AM +0100, Albert ARIBAUD wrote:
Hello Tom,
On Mon, 2 Feb 2015 13:56:57 -0500, Tom Rini tr...@ti.com wrote:
And (and this is being split into
different email threads, sigh), it would be good, possibly, if we have
something that means very early init
Hi Tom,
On 10 February 2015 at 15:07, Tom Rini tr...@ti.com wrote:
On Wed, Feb 04, 2015 at 09:48:32AM +0100, Albert ARIBAUD wrote:
Hello Tom,
On Mon, 2 Feb 2015 13:56:57 -0500, Tom Rini tr...@ti.com wrote:
And (and this is being split into
different email threads, sigh), it would be
Hi,
On 05-02-15 04:00, Simon Glass wrote:
Hi Albert,
On 4 February 2015 at 01:48, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
Hello Tom,
On Mon, 2 Feb 2015 13:56:57 -0500, Tom Rini tr...@ti.com wrote:
And (and this is being split into
different email threads, sigh), it would be good,
Hi Albert,
On 5 February 2015 at 11:02, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
Hello Simon,
On Thu, 5 Feb 2015 08:34:53 -0700, Simon Glass s...@chromium.org wrote:
Hi Albert,
reset - no stack, no RAM ( (except SPL can presumably access data section)
More precisely: from a
Hi Albert,
On 5 February 2015 at 08:14, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
Hello Simon,
On Wed, 4 Feb 2015 20:00:48 -0700, Simon Glass s...@chromium.org wrote:
Hi Albert,
On 4 February 2015 at 01:48, Albert ARIBAUD albert.u.b...@aribaud.net
wrote:
Hello Tom,
On Mon, 2
Hello Simon,
On Wed, 4 Feb 2015 20:00:48 -0700, Simon Glass s...@chromium.org wrote:
Hi Albert,
On 4 February 2015 at 01:48, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
Hello Tom,
On Mon, 2 Feb 2015 13:56:57 -0500, Tom Rini tr...@ti.com wrote:
And (and this is being split into
Hello Simon,
On Thu, 5 Feb 2015 08:34:53 -0700, Simon Glass s...@chromium.org wrote:
Hi Albert,
reset - no stack, no RAM ( (except SPL can presumably access data section)
More precisely: from a hardware viewpoint there would be no DDR, but
there could be SRAM, and from a program
Hello Tom,
On Mon, 2 Feb 2015 13:56:57 -0500, Tom Rini tr...@ti.com wrote:
And (and this is being split into
different email threads, sigh), it would be good, possibly, if we have
something that means very early init things, but we can be written in
C.
Very early -- and early too, BTW -- is
Hi Albert,
On 4 February 2015 at 01:48, Albert ARIBAUD albert.u.b...@aribaud.net wrote:
Hello Tom,
On Mon, 2 Feb 2015 13:56:57 -0500, Tom Rini tr...@ti.com wrote:
And (and this is being split into
different email threads, sigh), it would be good, possibly, if we have
something that means
On Sat, Jan 31, 2015 at 03:14:35PM -0700, Simon Glass wrote:
Hi Tom,
On 31 January 2015 at 14:49, Tom Rini tr...@ti.com wrote:
On Sat, Jan 31, 2015 at 10:25:50PM +0100, Albert ARIBAUD wrote:
Hello Tom,
On Tue, 27 Jan 2015 09:23:47 -0500, Tom Rini tr...@ti.com wrote:
On Mon,
+Bin
Hi Tom,
On 2 February 2015 at 11:56, Tom Rini tr...@ti.com wrote:
On Sat, Jan 31, 2015 at 03:14:35PM -0700, Simon Glass wrote:
Hi Tom,
On 31 January 2015 at 14:49, Tom Rini tr...@ti.com wrote:
On Sat, Jan 31, 2015 at 10:25:50PM +0100, Albert ARIBAUD wrote:
Hello Tom,
Hello Tom,
On Tue, 27 Jan 2015 09:23:47 -0500, Tom Rini tr...@ti.com wrote:
On Mon, Jan 26, 2015 at 08:32:41PM +0100, Hans de Goede wrote:
Hi,
On 26-01-15 16:18, Tom Rini wrote:
On Fri, Jan 23, 2015 at 09:54:12AM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 22:03, Tom Rini wrote:
On Sat, Jan 31, 2015 at 10:25:50PM +0100, Albert ARIBAUD wrote:
Hello Tom,
On Tue, 27 Jan 2015 09:23:47 -0500, Tom Rini tr...@ti.com wrote:
On Mon, Jan 26, 2015 at 08:32:41PM +0100, Hans de Goede wrote:
Hi,
On 26-01-15 16:18, Tom Rini wrote:
On Fri, Jan 23, 2015 at 09:54:12AM
Hi Tom,
On 31 January 2015 at 14:49, Tom Rini tr...@ti.com wrote:
On Sat, Jan 31, 2015 at 10:25:50PM +0100, Albert ARIBAUD wrote:
Hello Tom,
On Tue, 27 Jan 2015 09:23:47 -0500, Tom Rini tr...@ti.com wrote:
On Mon, Jan 26, 2015 at 08:32:41PM +0100, Hans de Goede wrote:
Hi,
On Mon, Jan 26, 2015 at 08:32:41PM +0100, Hans de Goede wrote:
Hi,
On 26-01-15 16:18, Tom Rini wrote:
On Fri, Jan 23, 2015 at 09:54:12AM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 22:03, Tom Rini wrote:
On Thu, Jan 22, 2015 at 08:10:06PM +0100, Hans de Goede wrote:
Hi,
On 22-01-15
On Fri, Jan 23, 2015 at 09:54:12AM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 22:03, Tom Rini wrote:
On Thu, Jan 22, 2015 at 08:10:06PM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 17:20, Tom Rini wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs /
Hi,
On 26-01-15 16:18, Tom Rini wrote:
On Fri, Jan 23, 2015 at 09:54:12AM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 22:03, Tom Rini wrote:
On Thu, Jan 22, 2015 at 08:10:06PM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 17:20, Tom Rini wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans
Hello Tom,
On Thu, 22 Jan 2015 11:20:58 -0500, Tom Rini tr...@ti.com wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init hook with a weak default which just calls
Hi,
On 26-01-15 09:09, Albert ARIBAUD wrote:
Hello Tom,
On Thu, 22 Jan 2015 11:20:58 -0500, Tom Rini tr...@ti.com wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init
Hi,
On 22-01-15 22:03, Tom Rini wrote:
On Thu, Jan 22, 2015 at 08:10:06PM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 17:20, Tom Rini wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache,
Hi,
On 21-01-15 22:59, Bill Pringlemeir wrote:
On 21 Jan 2015, hdego...@redhat.com wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before
enabling the icache, etc. Add a soc_init hook with a weak default
which just calls cpu_init_cp15.
This way different implementations can be
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init hook with a weak default which just calls
cpu_init_cp15.
This way different implementations can be provided to do some extra
On 21 Jan 2015, hdego...@redhat.com wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before
enabling the icache, etc. Add a soc_init hook with a weak default
which just calls cpu_init_cp15.
This way different implementations can be provided to do some extra
work before or
Hi,
On 22-01-15 17:20, Tom Rini wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init hook with a weak default which just calls
cpu_init_cp15.
This way different
On Thu, Jan 22, 2015 at 08:10:06PM +0100, Hans de Goede wrote:
Hi,
On 22-01-15 17:20, Tom Rini wrote:
On Wed, Jan 21, 2015 at 09:03:25PM +0100, Hans de Goede wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init hook with a weak
On some SoCs / ARMv7 CPU cores we need to do some setup before enabling the
icache, etc. Add a soc_init hook with a weak default which just calls
cpu_init_cp15.
This way different implementations can be provided to do some extra work
before or after cpu_init_cp15, or completely replacing
On 21 Jan 2015, hdego...@redhat.com wrote:
On some SoCs / ARMv7 CPU cores we need to do some setup before
enabling the icache, etc. Add a soc_init hook with a weak default
which just calls cpu_init_cp15.
This way different implementations can be provided to do some extra
work before or
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