From: Jagan Teki <ja...@amarulasolutions.com>
Since the size of SPL can't be exceeded 0x8000 bytes in RK3288,
it is not possible add new SPL features like Falcon mode or etc.
So add TPL stage so-that adding new features to SPL is possible.
- TPL: DRAM init, clocks
- SPL: MMC, falcon, etc
Booting from SD with TPL:
------------------------
U-Boot TPL 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54)
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54)
Trying to boot from MMC1
U-Boot 2017.09-rc2-13369-gfa72baf-dirty (Aug 26 2017 - 15:48:54 +0530)
Model: Amarula Vyasa-RK3288
DRAM: 2 GiB
MMC: dwmmc@ff0c0000: 1
Using default environment
In: serial@ff690000
Out: serial@ff690000
Err: serial@ff690000
Model: Amarula Vyasa-RK3288
Net: Net Initialization Skipped
No ethernet found.
Hit any key to stop autoboot: 0
=>
Signed-off-by: Jagan Teki <ja...@amarulasolutions.com>
---
Note:
Right now TPL added in vyasa board, ie reason some clock code
is duplicate in SPL and TPL. Once all rk3288 agree the will remove
duplicates.
arch/arm/mach-rockchip/Makefile | 1 +
arch/arm/mach-rockchip/rk3288-board-spl.c | 3 +
arch/arm/mach-rockchip/rk3288-board-tpl.c | 124 ++++++++++++++++++++++++++++++
arch/arm/mach-rockchip/rk3288/Kconfig | 15 ++++
configs/vyasa-rk3288_defconfig | 2 +
doc/README.rockchip | 18 +++++
include/configs/rk3288_common.h | 8 +-
7 files changed, 170 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-rockchip/rk3288-board-tpl.c
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 79e9704..daafc8d 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -12,6 +12,7 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
save_boot_param.o
obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c
b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 6b7bf85..febc1ef 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -243,12 +243,15 @@ void board_init_f(ulong dummy)
}
#endif
+#if !defined(CONFIG_SUPPORT_TPL)
debug("\nspl:init dram\n");
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
debug("DRAM init failed: %d\n", ret);
return;
}
+#endif
+
#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
diff --git a/arch/arm/mach-rockchip/rk3288-board-tpl.c
b/arch/arm/mach-rockchip/rk3288-board-tpl.c
new file mode 100644
index 0000000..7a7fd05
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3288-board-tpl.c
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <dm.h>
+#include <ram.h>
+#include <spl.h>
+#include <version.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/periph.h>
+#include <asm/arch/pmu_rk3288.h>
+#include <asm/arch/timer.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* read L2 control register (L2CTLR) */
+static inline uint32_t read_l2ctlr(void)
+{
+ uint32_t val = 0;
+
+ asm volatile ("mrc p15, 1, %0, c9, c0, 2" : "=r" (val));
+
+ return val;
+}
+
+/* write L2 control register (L2CTLR) */
+static inline void write_l2ctlr(uint32_t val)
+{
+ /*
+ * Note: L2CTLR can only be written when the L2 memory system
+ * is idle, ie before the MMU is enabled.
+ */
+ asm volatile("mcr p15, 1, %0, c9, c0, 2" : : "r" (val) : "memory");
+ isb();
+}
+
+static void configure_l2ctlr(void)
+{
+ uint32_t l2ctlr;
+
+ l2ctlr = read_l2ctlr();
+ l2ctlr &= 0xfffc0000; /* clear bit0~bit17 */
+
+ /*
+ * Data RAM write latency: 2 cycles
+ * Data RAM read latency: 2 cycles
+ * Data RAM setup latency: 1 cycle
+ * Tag RAM write latency: 1 cycle
+ * Tag RAM read latency: 1 cycle
+ * Tag RAM setup latency: 1 cycle
+ */
+ l2ctlr |= (1 << 3 | 1 << 0);
+ write_l2ctlr(l2ctlr);
+}
+
+
+void board_init_f(ulong dummy)
+{
+ struct udevice *dev;
+ int ret;
+
+ /* Example code showing how to enable the debug UART on RK3288 */
+#include <asm/arch/grf_rk3288.h>
+ /* Enable early UART on the RK3288 */
+#define GRF_BASE 0xff770000
+ struct rk3288_grf * const grf = (void *)GRF_BASE;
+
+ rk_clrsetreg(&grf->gpio7ch_iomux, GPIO7C7_MASK << GPIO7C7_SHIFT |
+ GPIO7C6_MASK << GPIO7C6_SHIFT,
+ GPIO7C7_UART2DBG_SOUT << GPIO7C7_SHIFT |
+ GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT);
+ /*
+ * Debug UART can be used from here if required:
+ *
+ * debug_uart_init();
+ * printch('a');
+ * printhex8(0x1234);
+ * printascii("string");
+ */
+ debug_uart_init();
+
+ ret = spl_early_init();
+ if (ret) {
+ debug("spl_early_init() failed: %d\n", ret);
+ hang();
+ }
+
+ rockchip_timer_init();
+ configure_l2ctlr();
+
+ ret = rockchip_get_clk(&dev);
+ if (ret) {
+ debug("CLK init failed: %d\n", ret);
+ return;
+ }
+
+ ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+ if (ret) {
+ debug("DRAM init failed: %d\n", ret);
+ return;
+ }
+}
+
+void board_return_to_bootrom(void)
+{
+ back_to_bootrom();
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_BOOTROM;
+}
+
+void spl_board_init(void)
+{
+ puts("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
+ U_BOOT_TIME ")\n");
+}
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig
b/arch/arm/mach-rockchip/rk3288/Kconfig
index 4ad2940..833073d 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -87,6 +87,21 @@ config TARGET_POPMETAL_RK3288
config TARGET_VYASA_RK3288
bool "Vyasa-RK3288"
select BOARD_LATE_INIT
+ select TPL
+ select SUPPORT_TPL
+ select TPL_DM
+ select TPL_REGMAP
+ select TPL_SYSCON
+ select TPL_CLK
+ select TPL_RAM
+ select TPL_OF_PLATDATA
+ select TPL_OF_CONTROL
+ select TPL_BOOTROM_SUPPORT
+ select ROCKCHIP_BROM_HELPER
+ select TPL_DRIVERS_MISC_SUPPORT
+ select TPL_LIBCOMMON_SUPPORT
+ select TPL_LIBGENERIC_SUPPORT
+ select TPL_SERIAL_SUPPORT
help
Vyasa is a RK3288-based development board with 2 USB ports,
HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It
diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig
index 7db7b0b..239409f 100644
--- a/configs/vyasa-rk3288_defconfig
+++ b/configs/vyasa-rk3288_defconfig
@@ -1,4 +1,6 @@
CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ROCKCHIP_RK3288=y
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 12fec38..4b7be0b 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -150,6 +150,24 @@ Note: rk3036 SDMMC and debug uart use the same iomux, so
if you boot from SD, th
debug uart must be disabled
+Booting from an SD card on RK3288 with TPL
+==========================================
+
+Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not
possible add
+new SPL features like Falcon mode or etc.
+
+So introduce TPL so-that adding new features to SPL is possible because now
TPL should
+run minimal with code like DDR, clock etc and rest of new features in SPL.
+
+As of now TPL is added on Vyasa-RK3288 board.
+
+To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
+
+ ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&
+ cat ./spl/u-boot-spl-dtb.bin >> out &&
+ sudo dd if=out of=/dev/mmcblk0 seek=64 &&
+ sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=256
+
Booting from an SD card on RK3188
=================================
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index ade6caf..e3e59c2 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -33,7 +33,13 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
#define CONFIG_SYS_LOAD_ADDR 0x00800800
#define CONFIG_SPL_STACK 0xff718000
-#define CONFIG_SPL_TEXT_BASE 0xff704004
+#ifdef CONFIG_TPL_BUILD
+# define CONFIG_SPL_TEXT_BASE 0xff704004
+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT)
+# define CONFIG_SPL_TEXT_BASE 0x0
+#else
+# define CONFIG_SPL_TEXT_BASE 0xff704004
+#endif
/* MMC/SD IP block */
#define CONFIG_BOUNCE_BUFFER
--
2.7.4
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