SMDK5420 has a new Security Management Unit added
for dwmmc driver, hence, configuring the control
registers to support booting via eMMC.
Signed-off-by: Alim Akhtar <alim.akh...@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwar...@samsung.com>
Acked-by: Simon Glass <s...@chromium.org>
---
Changes in V3:
- New patch.
Changes in V4:
Added flag to dissble SMU
Changes in V5:
- None
drivers/mmc/dw_mmc.c | 10 ++++++++++
drivers/mmc/exynos_dw_mmc.c | 3 +++
include/dwmmc.h | 15 +++++++++++++++
3 files changed, 28 insertions(+)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index a82ee17..2a8da5c 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -300,6 +300,16 @@ static int dwmci_init(struct mmc *mmc)
struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
u32 fifo_size;
+ if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
+ dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
+ dwmci_writel(host, EMMCP_SEND0, 0);
+ dwmci_writel(host, EMMCP_CTRL0,
+ MPSCTRL_SECURE_READ_BIT |
+ MPSCTRL_SECURE_WRITE_BIT |
+ MPSCTRL_NON_SECURE_READ_BIT |
+ MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
+ }
+
dwmci_writel(host, DWMCI_PWREN, 1);
if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 4ef9fec..f7439a0 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -62,6 +62,9 @@ int exynos_dwmci_add_port(int index, u32 regbase, int
bus_width, u32 clksel)
host->name = "EXYNOS DWMMC";
host->ioaddr = (void *)regbase;
host->buswidth = bus_width;
+#ifdef CONFIG_EXYNOS5420
+ host->quirks = DWMCI_QUIRK_DISABLE_SMU;
+#endif
if (clksel) {
host->clksel_val = clksel;
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 08ced0b..00bceec 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -49,6 +49,9 @@
#define DWMCI_DSCADDR 0x094
#define DWMCI_BUFADDR 0x098
#define DWMCI_DATA 0x200
+#define EMMCP_MPSBEGIN0 0x1200
+#define EMMCP_SEND0 0x1204
+#define EMMCP_CTRL0 0x120C
/* Interrupt Mask register */
#define DWMCI_INTMSK_ALL 0xffffffff
@@ -123,6 +126,18 @@
#define DWMCI_BMOD_IDMAC_FB (1 << 1)
#define DWMCI_BMOD_IDMAC_EN (1 << 7)
+#define MPSCTRL_SECURE_READ_BIT (0x1<<7)
+#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6)
+#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5)
+#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4)
+#define MPSCTRL_USE_FUSE_KEY (0x1<<3)
+#define MPSCTRL_ECB_MODE (0x1<<2)
+#define MPSCTRL_ENCRYPTION (0x1<<1)
+#define MPSCTRL_VALID (0x1<<0)
+
+/* quirks */
+#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
+
struct dwmci_host {
char *name;
void *ioaddr;
--
1.7.12.4
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