On Mon, Nov 4, 2013 at 11:20 PM, Lokesh Vutla wrote:
> Adding DPLLs Multiplier and DIvider values for GP EVM
> Following are the DPLL locking frequencies at OPP NOM
> MPU locks at 600MHz
> Core locks at 1000MHz
> Per locks at 960MHz
> DDR locks at 400MHz
>
Comment on getting the data from eFuse o
Adding DPLLs Multiplier and DIvider values for GP EVM
Following are the DPLL locking frequencies at OPP NOM
MPU locks at 600MHz
Core locks at 1000MHz
Per locks at 960MHz
DDR locks at 400MHz
Signed-off-by: Lokesh Vutla
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board/ti/am43xx/board.c | 17 +
1 file changed, 17 inser
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