Re: [U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

2015-09-10 Thread Thierry Reding
On Tue, Sep 08, 2015 at 03:58:38PM +, Tom Warren wrote: > Thierry, > > > -Original Message- > > From: Thierry Reding [mailto:thierry.red...@gmail.com] > > Sent: Tuesday, September 08, 2015 2:38 AM > > To: Tom Warren > > Cc: Nicolas Chauvet; u-boot@lists.denx.de > > Subject: [PATCH 2/2]

Re: [U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

2015-09-08 Thread Tom Warren
Thierry, > -Original Message- > From: Thierry Reding [mailto:thierry.red...@gmail.com] > Sent: Tuesday, September 08, 2015 2:38 AM > To: Tom Warren > Cc: Nicolas Chauvet; u-boot@lists.denx.de > Subject: [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC > > From: Thierry Reding >

[U-Boot] [PATCH 2/2] ARM: tegra114: Clear IDDQ when enabling PLLC

2015-09-08 Thread Thierry Reding
From: Thierry Reding Enabling a PLL while IDDQ is high. The Linux kernel checks for this condition and warns about it verbosely, so while this seems to work fine, fix it up according to the programming guidelines provided in the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup Sequen