Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-05 Thread Stephen Warren
On 11/02/2012 04:10 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 03:28 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 02:38 PM, Marek Vasut wrote: ... Dumb question -- might be unrelated. Does the tegra mmc driver do DMA? And if so, what happens if you do raw

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-05 Thread Marek Vasut
Dear Stephen Warren, On 11/02/2012 04:10 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 03:28 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 02:38 PM, Marek Vasut wrote: ... Dumb question -- might be unrelated. Does the tegra mmc driver do DMA? And if

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-05 Thread Simon Glass
Hi Stephen, On Mon, Nov 5, 2012 at 11:50 AM, Stephen Warren swar...@wwwdotorg.org wrote: On 11/02/2012 04:10 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 03:28 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 02:38 PM, Marek Vasut wrote: ... Dumb question -- might

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Stephen Warren
On 04/26/2012 11:29 PM, Mike Frysinger wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq() in drivers/mmc/mmc.c. This is a follow-up to: http://lists.denx.de/pipermail/u-boot/2012-April/123080.html which was referenced from:

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Simon Glass
Hi Stephen, On Fri, Nov 2, 2012 at 1:22 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 04/26/2012 11:29 PM, Mike Frysinger wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq() in drivers/mmc/mmc.c. This is a follow-up to:

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Marek Vasut
Dear Simon Glass, Hi Stephen, On Fri, Nov 2, 2012 at 1:22 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 04/26/2012 11:29 PM, Mike Frysinger wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq() in drivers/mmc/mmc.c. This is a

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Stephen Warren
On 11/02/2012 02:25 PM, Simon Glass wrote: Hi Stephen, On Fri, Nov 2, 2012 at 1:22 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 04/26/2012 11:29 PM, Mike Frysinger wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq() in drivers/mmc/mmc.c.

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Stephen Warren
On 11/02/2012 02:38 PM, Marek Vasut wrote: Dear Simon Glass, Hi Stephen, On Fri, Nov 2, 2012 at 1:22 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 04/26/2012 11:29 PM, Mike Frysinger wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq()

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Marek Vasut
Dear Stephen Warren, On 11/02/2012 02:38 PM, Marek Vasut wrote: Dear Simon Glass, Hi Stephen, On Fri, Nov 2, 2012 at 1:22 PM, Stephen Warren swar...@wwwdotorg.org wrote: On 04/26/2012 11:29 PM, Mike Frysinger wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Stephen Warren
On 11/02/2012 03:28 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 02:38 PM, Marek Vasut wrote: ... Dumb question -- might be unrelated. Does the tegra mmc driver do DMA? And if so, what happens if you do raw read to unaligned address (aka. how come you don't need the bounce

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-11-02 Thread Marek Vasut
Dear Stephen Warren, On 11/02/2012 03:28 PM, Marek Vasut wrote: Dear Stephen Warren, On 11/02/2012 02:38 PM, Marek Vasut wrote: ... Dumb question -- might be unrelated. Does the tegra mmc driver do DMA? And if so, what happens if you do raw read to unaligned address (aka. how

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-26 Thread Thierry Reding
* Mike Frysinger wrote: On Tuesday 24 April 2012 03:53:44 Thierry Reding wrote: The MMC core sometimes reads buffers that are smaller than a complete cacheline, for example when reading the SCR. In order to avoid a warning from the ARM v7 cache handling code, this patch makes sure that

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-26 Thread Simon Glass
Hi Thierry, On Thu, Apr 26, 2012 at 6:18 PM, Thierry Reding thierry.red...@avionic-design.de wrote: * Mike Frysinger wrote: On Tuesday 24 April 2012 03:53:44 Thierry Reding wrote: The MMC core sometimes reads buffers that are smaller than a complete cacheline, for example when reading

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-26 Thread Thierry Reding
* Simon Glass wrote: Hi Thierry, On Thu, Apr 26, 2012 at 6:18 PM, Thierry Reding thierry.red...@avionic-design.de wrote: * Mike Frysinger wrote: On Tuesday 24 April 2012 03:53:44 Thierry Reding wrote: The MMC core sometimes reads buffers that are smaller than a complete

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-26 Thread Mike Frysinger
On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq() in drivers/mmc/mmc.c. yes, that shows what we're talking about. int sd_change_freq(struct mmc *mmc) { ... stack vars ... int err; ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-26 Thread Simon Glass
Hi Mike, On Fri, Apr 27, 2012 at 5:29 PM, Mike Frysinger vap...@gentoo.org wrote: On Thursday 26 April 2012 06:34:43 Thierry Reding wrote: For reference, see sd_change_freq() in drivers/mmc/mmc.c. yes, that shows what we're talking about. int sd_change_freq(struct mmc *mmc) { ...

Re: [U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-25 Thread Mike Frysinger
On Tuesday 24 April 2012 03:53:44 Thierry Reding wrote: The MMC core sometimes reads buffers that are smaller than a complete cacheline, for example when reading the SCR. In order to avoid a warning from the ARM v7 cache handling code, this patch makes sure that complete cachelines are

[U-Boot] [PATCH 2/2] mmc: tegra: invalidate complete cachelines

2012-04-24 Thread Thierry Reding
The MMC core sometimes reads buffers that are smaller than a complete cacheline, for example when reading the SCR. In order to avoid a warning from the ARM v7 cache handling code, this patch makes sure that complete cachelines are flushed. Signed-off-by: Thierry Reding