unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
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Comment fix
Best Regards,
J.
board/armltd/integratorap/split_by_variant.sh | 18 -
cpu/arm1136/cpu.c | 46
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090402105317.ge...@game.jcrosoft.org you wrote:
cahed? Typo for cached?
yes
Please fix.
What is a cached processor ?
some arm processor or prototype does not have cache support
That's something different. You can cache data (resulting
On 00:39 Thu 02 Apr , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1238431700-7803-2-git-send-email-plagn...@jcrosoft.com you wrote:
unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1238431700-7803-2-git-send-email-plagn...@jcrosoft.com you wrote:
unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
...
+ echo /* May not be
unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
board/armltd/integratorap/split_by_variant.sh | 16 +++-
cpu/arm1136/cpu.c | 46 +++-
cpu/arm1176/cpu.c
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