On 03/20/2015 11:09 AM, Tom Rini wrote:
On Fri, Mar 20, 2015 at 10:26:12AM -0600, Stephen Warren wrote:
On 03/20/2015 06:24 AM, Thierry Reding wrote:
From: Thierry Reding
For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
AArch64 mode so that we don't need the SPL. Non-cach
On Fri, Mar 20, 2015 at 10:26:12AM -0600, Stephen Warren wrote:
> On 03/20/2015 06:24 AM, Thierry Reding wrote:
> >From: Thierry Reding
> >
> >For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
> >AArch64 mode so that we don't need the SPL. Non-cached memory is not
> >implemente
On 03/20/2015 06:24 AM, Thierry Reding wrote:
From: Thierry Reding
For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
AArch64 mode so that we don't need the SPL. Non-cached memory is not
implemented (yet) for 64-bit ARM.
diff --git a/include/configs/tegra-common.h b/includ
From: Thierry Reding
For 64-bit ARM SoCs we rely on non-U-Boot code to bring up the CPU in
AArch64 mode so that we don't need the SPL. Non-cached memory is not
implemented (yet) for 64-bit ARM.
Cc: Tom Warren
Signed-off-by: Thierry Reding
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include/configs/tegra-common.h | 4
1 file ch
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