On 13/03/17 17:50, Icenowy Zheng wrote:
> The DesignWare DRAM controller used by H3 and newer SoCs use a bit to
> identify whether the DRAM is half-width.
>
> As H3 itself come with 32-bit DRAM, the two modes of the bit used to be
> named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with 16-b
The DesignWare DRAM controller used by H3 and newer SoCs use a bit to
identify whether the DRAM is half-width.
As H3 itself come with 32-bit DRAM, the two modes of the bit used to be
named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with 16-bit DRAM
they're really 8-bit and 16-bit.
Rename t
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