Hi Marek,
On 02 November 2016 19:39, Marek Vasut wrote:
> On 11/02/2016 04:15 PM, Phil Edworthy wrote:
> > With the existing code, when the requested SPI clock rate is near
> > to the lowerest that can be achieved by the hardware (max divider
> > of the ref clock is 32), the generated clock rate i
On 11/02/2016 04:15 PM, Phil Edworthy wrote:
> With the existing code, when the requested SPI clock rate is near
> to the lowerest that can be achieved by the hardware (max divider
> of the ref clock is 32), the generated clock rate is wrong.
> For example, with a 50MHz ref clock, when asked for an
With the existing code, when the requested SPI clock rate is near
to the lowerest that can be achieved by the hardware (max divider
of the ref clock is 32), the generated clock rate is wrong.
For example, with a 50MHz ref clock, when asked for anything less
than a 1.5MHz SPI clock, the code sets up
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