Re: [U-Boot] [PATCH 3/3] [v2] powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)

2011-10-14 Thread Tabi Timur-B04825
Kumar Gala wrote: Rather than looking at tn2020_driver.uid lets just do something like: if ((phydev-drv-uid phydev-drv-mask) == TN2020_UID) And add a #define in phy.h: #define TN2020_UID0x00a19410 I guess that makes more sense. I thought my original version was cooler, though. --

Re: [U-Boot] [PATCH 3/3] [v2] powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)

2011-10-13 Thread Kumar Gala
On Oct 7, 2011, at 3:35 PM, Timur Tabi wrote: The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi ti...@freescale.com --- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c

[U-Boot] [PATCH 3/3] [v2] powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)

2011-10-07 Thread Timur Tabi
The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi ti...@freescale.com --- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 10 -- board/freescale/corenet_ds/eth_p4080.c