Hi Simon,
On Tue, May 5, 2015 at 10:05 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 May 2015 at 00:27, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Apr 28, 2015 at 10:05 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 27 April 2015 at 00:16, Bin Meng
Hi Simon,
On Tue, Apr 28, 2015 at 10:05 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 27 April 2015 at 00:16, Bin Meng bmeng...@gmail.com wrote:
Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are
Hi Bin,
On 4 May 2015 at 00:27, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, Apr 28, 2015 at 10:05 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 27 April 2015 at 00:16, Bin Meng bmeng...@gmail.com wrote:
Intel Quark SoC has the same interrupt routing mechanism as the
Hi Bin,
On 27 April 2015 at 00:16, Bin Meng bmeng...@gmail.com wrote:
Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.
Signed-off-by: Bin Meng bmeng...@gmail.com
Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/quark/Makefile | 2 +-
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