Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100.
Signed-off-by: Peng Fan <peng....@nxp.com>
Cc: Stefano Babic <sba...@denx.de>
Cc: Fabio Estevam <fabio.este...@nxp.com>
---
board/freescale/common/Makefile | 1 +
board/freescale/common/pfuze.c | 79 +++++++++++++++++++++++++++++++++++++++++
board/freescale/common/pfuze.h | 5 +++
3 files changed, 85 insertions(+)
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 1c53fb605b..e13cb2063c 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o
obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
obj-$(CONFIG_ZM7300) += zm7300.o
obj-$(CONFIG_POWER_PFUZE100) += pfuze.o
+obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze.o
obj-$(CONFIG_POWER_MC34VR500) += mc34vr500.o
obj-$(CONFIG_LS102XA_STREAM_ID) += ls102xa_stream_id.o
diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c
index 69afa83562..f194d0b79d 100644
--- a/board/freescale/common/pfuze.c
+++ b/board/freescale/common/pfuze.c
@@ -92,4 +92,83 @@ struct pmic *pfuze_common_init(unsigned char i2cbus)
return p;
}
+#else
+int pfuze_mode_init(struct udevice *dev, u32 mode)
+{
+ unsigned char offset, i, switch_num;
+ u32 id;
+ int ret;
+
+ id = pmic_reg_read(dev, PFUZE100_DEVICEID);
+ id = id & 0xf;
+
+ if (id == 0) {
+ switch_num = 6;
+ offset = PFUZE100_SW1CMODE;
+ } else if (id == 1) {
+ switch_num = 4;
+ offset = PFUZE100_SW2MODE;
+ } else {
+ printf("Not supported, id=%d\n", id);
+ return -EINVAL;
+ }
+
+ ret = pmic_reg_write(dev, PFUZE100_SW1ABMODE, mode);
+ if (ret < 0) {
+ printf("Set SW1AB mode error!\n");
+ return ret;
+ }
+
+ for (i = 0; i < switch_num - 1; i++) {
+ ret = pmic_reg_write(dev, offset + i * SWITCH_SIZE, mode);
+ if (ret < 0) {
+ printf("Set switch 0x%x mode error!\n",
+ offset + i * SWITCH_SIZE);
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
+struct udevice *pfuze_common_init(void)
+{
+ struct udevice *dev;
+ int ret;
+ unsigned int reg, dev_id, rev_id;
+
+ ret = pmic_get("pfuze100", &dev);
+ if (ret == -ENODEV)
+ return NULL;
+
+ dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
+ rev_id = pmic_reg_read(dev, PFUZE100_REVID);
+ printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
+
+ /* Set SW1AB stanby volage to 0.975V */
+ reg = pmic_reg_read(dev, PFUZE100_SW1ABSTBY);
+ reg &= ~SW1x_STBY_MASK;
+ reg |= SW1x_0_975V;
+ pmic_reg_write(dev, PFUZE100_SW1ABSTBY, reg);
+
+ /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+ reg = pmic_reg_read(dev, PFUZE100_SW1ABCONF);
+ reg &= ~SW1xCONF_DVSSPEED_MASK;
+ reg |= SW1xCONF_DVSSPEED_4US;
+ pmic_reg_write(dev, PFUZE100_SW1ABCONF, reg);
+
+ /* Set SW1C standby voltage to 0.975V */
+ reg = pmic_reg_read(dev, PFUZE100_SW1CSTBY);
+ reg &= ~SW1x_STBY_MASK;
+ reg |= SW1x_0_975V;
+ pmic_reg_write(dev, PFUZE100_SW1CSTBY, reg);
+
+ /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+ reg = pmic_reg_read(dev, PFUZE100_SW1CCONF);
+ reg &= ~SW1xCONF_DVSSPEED_MASK;
+ reg |= SW1xCONF_DVSSPEED_4US;
+ pmic_reg_write(dev, PFUZE100_SW1CCONF, reg);
+
+ return dev;
+}
#endif
diff --git a/board/freescale/common/pfuze.h b/board/freescale/common/pfuze.h
index 53cfc99225..3f8c107f6b 100644
--- a/board/freescale/common/pfuze.h
+++ b/board/freescale/common/pfuze.h
@@ -7,7 +7,12 @@
#ifndef __PFUZE_BOARD_HELPER__
#define __PFUZE_BOARD_HELPER__
+#ifdef CONFIG_DM_PMIC_PFUZE100
+struct udevice *pfuze_common_init(void);
+int pfuze_mode_init(struct udevice *dev, u32 mode);
+#else
struct pmic *pfuze_common_init(unsigned char i2cbus);
int pfuze_mode_init(struct pmic *p, u32 mode);
+#endif
#endif
--
2.14.1
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