On Jul 14, 2010, at 10:14 AM, Kumar Gala wrote:
> From: york
>
> Previous code presumes each DIMM has up to two rank (chip select). Newer
> DDR controller supports up to four chip select on one DIMM.
>
> Signed-off-by: York Sun
> ---
> arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 52
From: york
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.
Signed-off-by: York Sun
---
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 52 ++-
.../cpu/mpc8xxx/ddr/lc_common_dimm_params.c
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