Re: [U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-25 Thread Vignesh Raghavendra
On 25/09/19 1:57 PM, Simon Goldschmidt wrote: > Hi Vignesh, > > On Wed, Sep 25, 2019 at 10:20 AM Vignesh Raghavendra wrote: >> >> Simon, >> >> On 24/09/19 5:54 PM, tudor.amba...@microchip.com wrote: >>> Hi, Simon, >>> >>> On 09/24/2019 02:47 PM, Simon Goldschmidt wrote: External E-Mail >>>

Re: [U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-25 Thread Simon Goldschmidt
Hi Vignesh, On Wed, Sep 25, 2019 at 10:20 AM Vignesh Raghavendra wrote: > > Simon, > > On 24/09/19 5:54 PM, tudor.amba...@microchip.com wrote: > > Hi, Simon, > > > > On 09/24/2019 02:47 PM, Simon Goldschmidt wrote: > >> External E-Mail > >> > >> > >> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghav

Re: [U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-25 Thread Vignesh Raghavendra
Simon, On 24/09/19 5:54 PM, tudor.amba...@microchip.com wrote: > Hi, Simon, > > On 09/24/2019 02:47 PM, Simon Goldschmidt wrote: >> External E-Mail >> >> >> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote: >>> >>> Newer variants of n25q256* and n25q512* flashes support 4 Byte >>> addre

Re: [U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-24 Thread Tudor.Ambarus
Hi, Simon, On 09/24/2019 02:47 PM, Simon Goldschmidt wrote: > External E-Mail > > > On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote: >> >> Newer variants of n25q256* and n25q512* flashes support 4 Byte >> addressing opcodes. Add entries for the same. These flashes Bit 6 set in >> 5th

Re: [U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-24 Thread Simon Goldschmidt
+Tudor Ambarus (from discussion in https://patchwork.ozlabs.org/patch/1160501/) On Tue, Sep 24, 2019 at 1:47 PM Simon Goldschmidt wrote: > > On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote: > > > > Newer variants of n25q256* and n25q512* flashes support 4 Byte > > addressing opcodes. A

Re: [U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-24 Thread Simon Goldschmidt
On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra wrote: > > Newer variants of n25q256* and n25q512* flashes support 4 Byte > addressing opcodes. Add entries for the same. These flashes Bit 6 set in > 5th byte of READ ID response. > > Signed-off-by: Vignesh Raghavendra > --- > drivers/mtd/spi/

[U-Boot] [PATCH RFT 3/3] spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and n25q512*

2019-09-23 Thread Vignesh Raghavendra
Newer variants of n25q256* and n25q512* flashes support 4 Byte addressing opcodes. Add entries for the same. These flashes Bit 6 set in 5th byte of READ ID response. Signed-off-by: Vignesh Raghavendra --- drivers/mtd/spi/spi-nor-ids.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/driver