On 12/4/2013 8:50 AM, Vaibhav Bedia wrote:
On Sun, Dec 1, 2013 at 10:53 PM, Lokesh Vutla lokeshvu...@ti.com wrote:
[...]
I read more about it and got inputs from Sekhar. I came to know that there
is a DEV_ATTRIBUTE register
which tells about the safest OPP to boot with. Looks like this
On Sun, Dec 1, 2013 at 10:53 PM, Lokesh Vutla lokeshvu...@ti.com wrote:
[...]
I read more about it and got inputs from Sekhar. I came to know that there is
a DEV_ATTRIBUTE register
which tells about the safest OPP to boot with. Looks like this should be
sufficient to get the values.
Ill add
On Thursday 28 November 2013 04:18 AM, Vaibhav Bedia wrote:
On Wed, Nov 27, 2013 at 1:58 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Wednesday 27 November 2013 05:36 AM, Vaibhav Bedia wrote:
On Mon, Nov 25, 2013 at 12:08 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Friday 22 November 2013
On Wed, Nov 27, 2013 at 1:58 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Wednesday 27 November 2013 05:36 AM, Vaibhav Bedia wrote:
On Mon, Nov 25, 2013 at 12:08 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Friday 22 November 2013 02:07 AM, Vaibhav Bedia wrote:
On Thu, Nov 21, 2013 at 1:18
On Mon, Nov 25, 2013 at 12:08 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Friday 22 November 2013 02:07 AM, Vaibhav Bedia wrote:
On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Updating the Multiplier and Dividers values for all DPLLs for EPOS EVM.
Following are the
On Wednesday 27 November 2013 05:36 AM, Vaibhav Bedia wrote:
On Mon, Nov 25, 2013 at 12:08 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
On Friday 22 November 2013 02:07 AM, Vaibhav Bedia wrote:
On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Updating the Multiplier and
On Friday 22 November 2013 02:07 AM, Vaibhav Bedia wrote:
On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Updating the Multiplier and Dividers values for all DPLLs for EPOS EVM.
Following are the DPLL locking frequencies at OPP NOM:
MPU locks at 600MHz
Core locks at
On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla lokeshvu...@ti.com wrote:
Updating the Multiplier and Dividers values for all DPLLs for EPOS EVM.
Following are the DPLL locking frequencies at OPP NOM:
MPU locks at 600MHz
Core locks at 1000MHz
Per locks at 960MHz
DDR locks at 266MHz
As
Updating the Multiplier and Dividers values for all DPLLs for EPOS EVM.
Following are the DPLL locking frequencies at OPP NOM:
MPU locks at 600MHz
Core locks at 1000MHz
Per locks at 960MHz
DDR locks at 266MHz
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
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arch/arm/cpu/armv7/am33xx/clock.c
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