On Sun, Dec 1, 2013 at 11:21 PM, Lokesh Vutla wrote:
][...]
> We should not rely on RTC here. I don't think U-Boot should worry about low
> power state. You mean to
> say about passing this information to kernel?
No. I am not asking you to pass this to the kernel.
> In the current kernel also m
On Thursday 28 November 2013 04:33 AM, Vaibhav Bedia wrote:
> On Wed, Nov 27, 2013 at 4:34 AM, Lokesh Vutla wrote:
> [...]
>> Ideally the default value should be exported from e-fuse values.
>> EMIF does some HW sequence according to the value exported here. This filed
>> tells
>> what type of me
On Wed, Nov 27, 2013 at 4:34 AM, Lokesh Vutla wrote:
[...]
> Ideally the default value should be exported from e-fuse values.
> EMIF does some HW sequence according to the value exported here. This filed
> tells
> what type of memory it is.
>
No, eFuse is not the right place for this information
On Wednesday 27 November 2013 05:47 AM, Vaibhav Bedia wrote:
> On Mon, Nov 25, 2013 at 12:18 AM, Lokesh Vutla wrote:
>> On Friday 22 November 2013 02:22 AM, Vaibhav Bedia wrote:
>>> On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla wrote:
>>> [...]
>>>
-/*
- * Get SDRAM type connected to EM
On Mon, Nov 25, 2013 at 12:18 AM, Lokesh Vutla wrote:
> On Friday 22 November 2013 02:22 AM, Vaibhav Bedia wrote:
>> On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla wrote:
>> [...]
>>
>>> -/*
>>> - * Get SDRAM type connected to EMIF.
>>> - * Assuming similar SDRAM parts are connected to both EMIF's
On Friday 22 November 2013 02:22 AM, Vaibhav Bedia wrote:
> On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla wrote:
> [...]
>
>> -/*
>> - * Get SDRAM type connected to EMIF.
>> - * Assuming similar SDRAM parts are connected to both EMIF's
>> - * which is typically the case. So it is sufficient to ge
On Thu, Nov 21, 2013 at 1:18 AM, Lokesh Vutla wrote:
[...]
> -/*
> - * Get SDRAM type connected to EMIF.
> - * Assuming similar SDRAM parts are connected to both EMIF's
> - * which is typically the case. So it is sufficient to get
> - * SDRAM type from EMIF1.
> - */
> -u32 emif_sdram_type()
> -{
GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
Adding details for the same.
Below is the brief description of DDR3 init sequence(SW leveling):
-> Enable VTT regulator
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
->
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