Hi Heiko,
Hello Simon, Lubomir,
Am 03.02.2015 01:59, schrieb Simon Glass:
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either
Hello Simon, Lubomir,
Am 03.02.2015 01:59, schrieb Simon Glass:
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does
Hello Simon, Lubomir,
Am 03.02.2015 01:59, schrieb Simon Glass:
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does
Hi Simon,
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does not come into effect at all, or normal operation of
Hi Simon,
On Tue, 3 Feb 2015 10:10:02 +0200
Lubomir Popov lpo...@mm-sol.com wrote:
Hi Simon,
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic
Hi Masahiro,
On 3 February 2015 at 01:35, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
On Tue, 3 Feb 2015 10:10:02 +0200
Lubomir Popov lpo...@mm-sol.com wrote:
Hi Simon,
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that
Hi,
On 30 January 2015 at 10:56, Lubomir Popov lpo...@mm-sol.com wrote:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does not come into effect at all, or normal operation of internal
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does not come into effect at all, or normal operation of internal circuitry
cannot be guaranteed. The current implementation of the 'i2c write'
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