From: Patrice Chotard <patrice.chot...@st.com>
This driver is currently used by STM32F7 and STM32H7 SoCs.
As CONFIG_CLK and OF_CONTROL flags are set by default for these
2 SoCs, this flag becomes useless in this driver, so remove it.
Signed-off-by: Patrice Chotard <patrice.chot...@st.com>
---
drivers/serial/serial_stm32x7.c | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
index 44e8b42..a5d529c 100644
--- a/drivers/serial/serial_stm32x7.c
+++ b/drivers/serial/serial_stm32x7.c
@@ -83,7 +83,9 @@ static int stm32_serial_pending(struct udevice *dev, bool
input)
static int stm32_serial_probe(struct udevice *dev)
{
struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
+ struct clk clk;
fdt_addr_t base = plat->base;
+ int ret;
bool stm32f4;
u8 uart_enable_bit;
@@ -91,10 +93,6 @@ static int stm32_serial_probe(struct udevice *dev)
stm32f4 = plat->uart_info->stm32f4;
uart_enable_bit = plat->uart_info->uart_enable_bit;
-#ifdef CONFIG_CLK
- int ret;
- struct clk clk;
-
ret = clk_get_by_index(dev, 0, &clk);
if (ret < 0)
return ret;
@@ -104,7 +102,6 @@ static int stm32_serial_probe(struct udevice *dev)
dev_err(dev, "failed to enable clock\n");
return ret;
}
-#endif
plat->clock_rate = clk_get_rate(&clk);
if (plat->clock_rate < 0) {
@@ -125,7 +122,6 @@ static int stm32_serial_probe(struct udevice *dev)
return 0;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
static const struct udevice_id stm32_serial_id[] = {
{ .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
{ .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
@@ -143,7 +139,6 @@ static int stm32_serial_ofdata_to_platdata(struct udevice
*dev)
return 0;
}
-#endif
static const struct dm_serial_ops stm32_serial_ops = {
.putc = stm32_serial_putc,
--
1.9.1
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