On 10/24/2016 01:48 PM, Darwin Dingel wrote:
> Core hang occurs when using L1 stashes. Workaround is to disable L1
> stashes so software uses L2 cache for stashes instead.
>
> Reviewed-by: Chris Packham
> Signed-off-by: Darwin Dingel
> Cc: York Sun
> ---
> Changes for v2:
> - Enabled for T42
On 10/24/2016 01:48 PM, Darwin Dingel wrote:
> +#define CONFIG_SYS_FSL_ERRATUM_A007907
Sorry I cannot merge this patch now. This new macro is rejected by
recent enforcement of using Kconfig. I will hold this in my queue and
change it to Kconfig when I finish converting these macros.
York
__
On 10/24/2016 02:16 PM, york@nxp.com wrote:
>> +
>> +#ifdef CONFIG_SYS_FSL_ERRATUM_A007907
>> +flush_dcache();
>> +mtspr(L1CSR2, (mfspr(L1CSR2) & ~L1CSR2_DCSTASHID));
>> +sync();
>> +#endif
>> +
>
> My erratum document shows a second step is to insert sync instruction
> before each
On 10/24/2016 01:48 PM, Darwin Dingel wrote:
> Core hang occurs when using L1 stashes. Workaround is to disable L1
> stashes so software uses L2 cache for stashes instead.
>
> Reviewed-by: Chris Packham
> Signed-off-by: Darwin Dingel
> Cc: York Sun
> ---
> Changes for v2:
> - Enabled for T42
Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.
Reviewed-by: Chris Packham
Signed-off-by: Darwin Dingel
Cc: York Sun
---
Changes for v2:
- Enabled for T4240 and B4860
arch/powerpc/cpu/mpc85xx/cmd_errata.c | 4 +
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